+#define EAP7660D_BOARDCONFIG 0x1F7F0000
+#define EAP7660D_GBIC_MAC_OFFSET 0x1000
+#define EAP7660D_WMAC0_MAC_OFFSET 0x1010
+#define EAP7660D_WMAC1_MAC_OFFSET 0x1016
+#define EAP7660D_WMAC0_CALDATA_OFFSET 0x2000
+#define EAP7660D_WMAC1_CALDATA_OFFSET 0x3000
+
+static struct ath5k_platform_data eap7660d_wmac0_data;
+static struct ath5k_platform_data eap7660d_wmac1_data;
+static char eap7660d_wmac0_mac[6];
+static char eap7660d_wmac1_mac[6];
+static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS];
+static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS];
+
+static struct ar71xx_pci_irq eap7660d_pci_irqs[] __initdata = {
+ {
+ .slot = 0,
+ .pin = 1,
+ .irq = AR71XX_PCI_IRQ_DEV0,
+ }, {
+ .slot = 1,
+ .pin = 1,
+ .irq = AR71XX_PCI_IRQ_DEV1,
+ }
+};
+
+static int eap7660d_pci_plat_dev_init(struct pci_dev *dev)
+{
+ switch(PCI_SLOT(dev->devfn)) {
+ case 17:
+ dev->dev.platform_data = &eap7660d_wmac0_data;
+ break;
+
+ case 18:
+ dev->dev.platform_data = &eap7660d_wmac1_data;
+ break;
+ }
+
+ return 0;
+}
+
+void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0,
+ u8 *cal_data1, u8 *mac_addr1)
+{
+ if (cal_data0 && *cal_data0 == 0xa55a) {
+ memcpy(eap7660d_wmac0_eeprom, cal_data0,
+ ATH5K_PLAT_EEP_MAX_WORDS);
+ eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom;
+ }
+
+ if (cal_data1 && *cal_data1 == 0xa55a) {
+ memcpy(eap7660d_wmac1_eeprom, cal_data1,
+ ATH5K_PLAT_EEP_MAX_WORDS);
+ eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom;
+ }
+
+ if (mac_addr0) {
+ memcpy(eap7660d_wmac0_mac, mac_addr0, sizeof(eap7660d_wmac0_mac));
+ eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac;
+ }
+
+ if (mac_addr1) {
+ memcpy(eap7660d_wmac1_mac, mac_addr1, sizeof(eap7660d_wmac1_mac));
+ eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac;
+ }
+
+ ar71xx_pci_plat_dev_init = eap7660d_pci_plat_dev_init;
+ ar71xx_pci_init(ARRAY_SIZE(eap7660d_pci_irqs), eap7660d_pci_irqs);
+}