brcm47xx: run ssb_pcicore_fix_sprom_core_index just for ssb bus on pci
authorhauke <hauke@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 24 Jul 2011 15:18:29 +0000 (15:18 +0000)
committerhauke <hauke@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 24 Jul 2011 15:18:29 +0000 (15:18 +0000)
ssb_pcicore_fix_sprom_core_index accesses the sprom on the pci bus but
this causes a data bus error (oops) on a SoC.

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27758 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/brcm47xx/patches-3.0/230-ssb_pci_sprom.patch [new file with mode: 0644]

diff --git a/target/linux/brcm47xx/patches-3.0/230-ssb_pci_sprom.patch b/target/linux/brcm47xx/patches-3.0/230-ssb_pci_sprom.patch
new file mode 100644 (file)
index 0000000..30f133b
--- /dev/null
@@ -0,0 +1,19 @@
+--- a/drivers/ssb/driver_pcicore.c
++++ b/drivers/ssb/driver_pcicore.c
+@@ -516,10 +516,14 @@ static void ssb_pcicore_pcie_setup_worka
+ static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
+ {
+-      ssb_pcicore_fix_sprom_core_index(pc);
++      struct ssb_device *pdev = pc->dev;
++      struct ssb_bus *bus = pdev->bus;
++
++      if (bus->bustype == SSB_BUSTYPE_PCI)
++              ssb_pcicore_fix_sprom_core_index(pc);
+       /* Disable PCI interrupts. */
+-      ssb_write32(pc->dev, SSB_INTVEC, 0);
++      ssb_write32(pdev, SSB_INTVEC, 0);
+       /* Additional PCIe always once-executed workarounds */
+       if (pc->dev->id.coreid == SSB_DEV_PCIE) {
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