funk/nrf24l01p.h

   1 #ifndef _NRF24L01P_H
   2 #define _NRF24L01P_H 1
   3 #include <stdint.h>
   4
   5 #define MAX_PKT (32) // space for crc is supplied by the caller
   6
   7 // SPI commands
   8 #define C_R_REGISTER            0x00
   9 #define C_W_REGISTER            0x20
  10 #define C_R_RX_PAYLOAD          0x61
  11 #define C_W_TX_PAYLOAD          0xA0
  12 #define C_FLUSH_TX              0xE1
  13 #define C_FLUSH_RX              0xE2
  14 #define C_REUSE_TX_PL           0xE3
  15 #define C_R_RX_PL_WID           0x60
  16 #define C_W_ACK_PAYLOAD         0xA8
  17 #define C_W_TX_PAYLOAD_NOCACK   0xB0
  18 #define C_NOP                   0xFF
  19
  20 // Registers
  21 #define R_CONFIG                0x00
  22 #define R_EN_AA                 0x01
  23 #define R_EN_RXADDR             0x02
  24 #define R_SETUP_AW              0x03
  25 #define R_SETUP_RETR            0x04
  26 #define R_RF_CH                 0x05
  27 #define R_RF_SETUP              0x06
  28 #define R_STATUS                0x07
  29 #define R_OBSERVE_TX            0x08
  30 #define R_RPD                   0x09
  31 #define R_RX_ADDR_P0            0x0A
  32  #define R_RX_ADDR_P0_LEN 5
  33 #define R_RX_ADDR_P1            0x0B
  34  #define R_RX_ADDR_P1_LEN 5
  35 #define R_RX_ADDR_P2            0x0C
  36  #define R_RX_ADDR_P2_LEN 1
  37 #define R_RX_ADDR_P3            0x0D
  38  #define R_RX_ADDR_P3_LEN 1
  39 #define R_RX_ADDR_P4            0x0E
  40  #define R_RX_ADDR_P4_LEN 1
  41 #define R_RX_ADDR_P5            0x0F
  42  #define R_RX_ADDR_P5_LEN 1
  43 #define R_TX_ADDR               0x10
  44  #define R_TX_ADDR_LEN 5
  45 #define R_RX_PW_P0              0x11
  46 #define R_RX_PW_P1              0x12
  47 #define R_RX_PW_P2              0x13
  48 #define R_RX_PW_P3              0x14
  49 #define R_RX_PW_P4              0x15
  50 #define R_RX_PW_P5              0x16
  51 #define R_FIFO_STATUS           0x17
  52 #define R_DYNPD                 0x1c
  53
  54 // Register Flags
  55
  56 //CONFIG register definitions
  57 #define R_CONFIG_RESERVED        0x80
  58 #define R_CONFIG_MASK_RX_DR      0x40
  59 #define R_CONFIG_MASK_TX_DS      0x20
  60 #define R_CONFIG_MASK_MAX_RT     0x10
  61 #define R_CONFIG_EN_CRC          0x08
  62 #define R_CONFIG_CRCO            0x04
  63 #define R_CONFIG_PWR_UP          0x02
  64 #define R_CONFIG_PRIM_RX         0x01
  65
  66 //EN_AA register definitions
  67 #define R_EN_AA_ENAA_P5          0x20
  68 #define R_EN_AA_ENAA_P4          0x10
  69 #define R_EN_AA_ENAA_P3          0x08
  70 #define R_EN_AA_ENAA_P2          0x04
  71 #define R_EN_AA_ENAA_P1          0x02
  72 #define R_EN_AA_ENAA_P0          0x01
  73 #define R_EN_AA_ENAA_NONE        0x00
  74
  75 //EN_RXADDR register definitions
  76 #define R_EN_RXADDR_ERX_P5       0x20
  77 #define R_EN_RXADDR_ERX_P4       0x10
  78 #define R_EN_RXADDR_ERX_P3       0x08
  79 #define R_EN_RXADDR_ERX_P2       0x04
  80 #define R_EN_RXADDR_ERX_P1       0x02
  81 #define R_EN_RXADDR_ERX_P0       0x01
  82 #define R_EN_RXADDR_ERX_NONE     0x00
  83
  84 // RF_CH register definitions
  85 #define R_RF_CH_BITS             0x7f
  86
  87 //RF_SETUP register definitions
  88 #define R_RF_SETUP_CONT_WAVE     0x80
  89 #define R_RF_SETUP_RF_DR_LOW     0x20
  90 #define R_RF_SETUP_PLL_LOCK      0x10
  91 #define R_RF_SETUP_RF_DR_HIGH    0x08
  92 #define R_RF_SETUP_RF_PWR_0      0x00
  93 #define R_RF_SETUP_RF_PWR_1      0x02
  94 #define R_RF_SETUP_RF_PWR_2      0x04
  95 #define R_RF_SETUP_RF_PWR_3      0x06
  96
  97 #define R_RF_SETUP_DR_1M         0x00
  98 #define R_RF_SETUP_DR_2M         0x08
  99 #define R_RF_SETUP_DR_250K       0x20
 100
 101 //SETUP_AW register definitions
 102 #define R_SETUP_AW_3             0x01
 103 #define R_SETUP_AW_4             0x02
 104 #define R_SETUP_AW_5             0x03
 105
 106 //STATUS register definitions
 107 #define R_STATUS_RX_DR           0x40
 108 #define R_STATUS_TX_DS           0x20
 109 #define R_STATUS_MAX_RT          0x10
 110 #define R_STATUS_RX_P_NO         0x0E
 111 #define R_STATUS_GET_RX_P_NO(x)  ((x&R_STATUS_RX_P_NO)>>1)
 112 #define R_STATUS_RX_FIFO_EMPTY   0x0E
 113 #define R_STATUS_TX_FULL         0x01
 114
 115 /* config structure */
 116
 117 struct NRF_CFG {
 118     uint8_t channel;
 119     uint8_t txmac[5];
 120     uint8_t mac0[5];
 121     uint8_t mac1[5];
 122     uint8_t mac2345[4];
 123     uint8_t nrmacs;
 124     uint8_t maclen[5];
 125 };
 126
 127 typedef struct NRF_CFG * nrfconfig;
 128
 129
 130 /* exported functions */
 131 #define nrf_rcv_pkt_time(maxtime, maxsize, pkt) \
 132     nrf_rcv_pkt_time_encr(maxtime, maxsize, pkt, NULL)
 133
 134 int nrf_rcv_pkt_time_encr(int maxtime, int maxsize, uint8_t * pkt, uint32_t const k[4]);
 135
 136 #define nrf_snd_pkt_crc(size, pkt) \
 137     nrf_snd_pkt_crc_encr(size, pkt, NULL)
 138 char nrf_snd_pkt_crc_encr(int size, uint8_t * pkt, uint32_t const k[4]);
 139
 140 void nrf_init() ;
 141 void nrf_off() ;
 142 void nrf_startCW();
 143
 144 void nrf_cmd(uint8_t cmd);
 145 uint8_t nrf_cmd_status(uint8_t cmd);
 146 void nrf_cmd_rw_long(uint8_t* data, int len);
 147 void nrf_read_long(const uint8_t reg, int len, uint8_t* data);
 148 void nrf_write_reg(const uint8_t reg, const uint8_t val);
 149 uint8_t nrf_read_reg(const uint8_t reg);
 150 void nrf_write_long(const uint8_t cmd, int len, const uint8_t* data);
 151
 152 void nrf_set_rx_mac(int pipe, int rxlen, int maclen, const uint8_t * mac);
 153 void nrf_set_tx_mac(int maclen, const uint8_t * mac);
 154 void nrf_disable_pipe(int pipe);
 155 void nrf_set_channel(int channel);
 156
 157 void nrf_config_set(nrfconfig config);
 158 void nrf_config_get(nrfconfig config);
 159
 160 void nrf_set_strength(unsigned char strength);
 161
 162 // new receive IF
 163 void nrf_rcv_pkt_start(void);
 164 int nrf_rcv_pkt_poll(int maxsize, uint8_t * pkt);
 165 int nrf_rcv_pkt_poll_dec(int maxsize, uint8_t * pkt, uint32_t const key[4]);
 166
 167 // more utility.
 168 void nrf_rcv_pkt_end(void);
 169 void nrf_check_reset(void);
 170 extern uint8_t _nrfresets;
 171
 172 /* END */
 173
 174 #endif /* _NRF24L01P_H */
 175