core/gpio/gpio.c

   1 /**************************************************************************/
   2 /*!
   3     @file     gpio.c
   4     @author   K. Townsend (microBuilder.eu)
   5     @date     22 March 2010
   6     @version  0.10
   7
   8     @section DESCRIPTION
   9
  10     Controls the general purpose digital IO.
  11
  12     @section LICENSE
  13
  14     Software License Agreement (BSD License)
  15
  16     Copyright (c) 2010, microBuilder SARL
  17     All rights reserved.
  18
  19     Redistribution and use in source and binary forms, with or without
  20     modification, are permitted provided that the following conditions are met:
  21     1. Redistributions of source code must retain the above copyright
  22     notice, this list of conditions and the following disclaimer.
  23     2. Redistributions in binary form must reproduce the above copyright
  24     notice, this list of conditions and the following disclaimer in the
  25     documentation and/or other materials provided with the distribution.
  26     3. Neither the name of the copyright holders nor the
  27     names of its contributors may be used to endorse or promote products
  28     derived from this software without specific prior written permission.
  29
  30     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  31     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  32     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  34     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  35     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  36     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  37     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  39     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40 */
  41 /**************************************************************************/
  42
  43 #include "gpio.h"
  44
  45 #ifdef CFG_CHIBI
  46 #include "drivers/rf/chibi/chb_drvr.h"
  47 volatile uint32_t chibi_counter  = 0;
  48 #endif
  49
  50 #ifdef CFG_ALTRESET
  51 #include "core/cpu/cpu.h"
  52 #endif
  53
  54 static bool _gpioInitialised = false;
  55
  56 /**************************************************************************/
  57 /*!
  58     @brief IRQ Handler for GPIO port 0 (currently checks pin 0.1)
  59
  60     @note  By default, this IRQ handler is probably disabled in
  61            projectconfig.h (see GPIO_ENABLE_IRQ0), but you can use
  62            the code below as a model to implement this interrupt
  63            handler in an appropriate place in your project.
  64 */
  65 /**************************************************************************/
  66 #if defined GPIO_ENABLE_IRQ0
  67 void PIOINT0_IRQHandler(void)
  68 {
  69   uint32_t regVal;
  70
  71   regVal = gpioIntStatus(0, 1);
  72   if (regVal)
  73   {
  74     gpioIntClear(0, 1);
  75   }
  76   return;
  77 }
  78 #endif
  79
  80 /**************************************************************************/
  81 /*!
  82     @brief IRQ Handler for GPIO port 1 (currently checks pin 1.1)
  83 */
  84 /**************************************************************************/
  85 #if defined GPIO_ENABLE_IRQ1
  86 void PIOINT1_IRQHandler(void)
  87 {
  88   uint32_t regVal;
  89
  90 #if defined CFG_ALTRESET && CFG_ALTRESET_PORT == 1
  91   regVal = gpioIntStatus(CFG_ALTRESET_PORT, CFG_ALTRESET_PIN);
  92   if (regVal)
  93   {
  94     // Cause a reset and wait
  95     cpuReset();
  96   }
  97 #endif
  98
  99 #ifdef CFG_CHIBI
 100   // Check for interrupt on 1.8
 101   regVal = gpioIntStatus(1, 8);
 102   if (regVal)
 103   {
 104     chibi_counter++;
 105     chb_ISR_Handler();
 106     gpioIntClear(1, 8);
 107   }
 108 #else
 109   regVal = gpioIntStatus(1, 1);
 110   if ( regVal )
 111   {
 112     gpioIntClear(1, 1);
 113   }
 114 #endif
 115
 116   return;
 117 }
 118 #endif
 119
 120 /**************************************************************************/
 121 /*!
 122     @brief IRQ Handler for GPIO port 2 (currently checks pin 2.1)
 123
 124     @note  By default, this IRQ handler is probably disabled in
 125            projectconfig.h (see GPIO_ENABLE_IRQ2), but you can use
 126            the code below as a model to implement this interrupt
 127            handler in an appropriate place in your project.
 128 */
 129 /**************************************************************************/
 130 #if defined GPIO_ENABLE_IRQ2
 131 void PIOINT2_IRQHandler(void)
 132 {
 133   uint32_t regVal;
 134
 135   regVal = gpioIntStatus(2, 1);
 136   if ( regVal )
 137   {
 138     gpioIntClear(2, 1);
 139   }
 140   return;
 141 }
 142 #endif
 143
 144 /**************************************************************************/
 145 /*!
 146     @brief IRQ Handler for GPIO port 3 (currently checks pin 3.1)
 147
 148     @note  By default, this IRQ handler is probably disabled in
 149            projectconfig.h (see GPIO_ENABLE_IRQ3), but you can use
 150            the code below as a model to implement this interrupt
 151            handler in an appropriate place in your project.
 152 */
 153 /**************************************************************************/
 154 #if defined GPIO_ENABLE_IRQ3
 155 void PIOINT3_IRQHandler(void)
 156 {
 157   uint32_t regVal;
 158
 159   regVal = gpioIntStatus(3, 1);
 160   if ( regVal )
 161   {
 162     gpioIntClear(3, 1);
 163   }
 164   return;
 165 }
 166 #endif
 167
 168 /**************************************************************************/
 169 /*!
 170     @brief Initialises GPIO and enables the GPIO interrupt
 171            handler for all GPIO ports.
 172 */
 173 /**************************************************************************/
 174 void gpioInit (void)
 175 {
 176   /* Enable AHB clock to the GPIO domain. */
 177   SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_GPIO);
 178
 179   /* Set up NVIC when I/O pins are configured as external interrupts. */
 180   NVIC_EnableIRQ(EINT0_IRQn);
 181   NVIC_EnableIRQ(EINT1_IRQn);
 182   NVIC_EnableIRQ(EINT2_IRQn);
 183   NVIC_EnableIRQ(EINT3_IRQn);
 184
 185   /* Set initialisation flag */
 186   _gpioInitialised = true;
 187
 188   return;
 189 }
 190
 191 /**************************************************************************/
 192 /*!
 193     @brief Sets the direction (input/output) for a specific port pin
 194
 195     @param[in]  portNum
 196                 The port number (0..3)
 197     @param[in]  bitPos
 198                 The bit position (0..11)
 199     @param[in]  dir
 200                 The pin direction (gpioDirection_Input or
 201                 gpioDirection_Output)
 202 */
 203 /**************************************************************************/
 204 void gpioSetDir (uint32_t portNum, uint32_t bitPos, gpioDirection_t dir)
 205 {
 206   if (!_gpioInitialised) gpioInit();
 207
 208   // Get the appropriate register (handled this way to optimise code size)
 209   REG32 *gpiodir = &GPIO_GPIO0DIR;
 210   switch (portNum)
 211   {
 212     case 0:
 213       gpiodir = &GPIO_GPIO0DIR;
 214       break;
 215     case 1:
 216       gpiodir = &GPIO_GPIO1DIR;
 217       break;
 218     case 2:
 219       gpiodir = &GPIO_GPIO2DIR;
 220       break;
 221     case 3:
 222       gpiodir = &GPIO_GPIO3DIR;
 223       break;
 224   }
 225
 226   // Toggle dir
 227   dir == gpioDirection_Output ? (*gpiodir |= (1 << bitPos)) : (*gpiodir &= ~(1 << bitPos));
 228 }
 229
 230 /**************************************************************************/
 231 /*!
 232     @brief Gets the value for a specific port pin
 233
 234     @param[in]  portNum
 235                 The port number (0..3)
 236     @param[in]  bitPos
 237                 The bit position (0..31)
 238
 239     @return     The current value for the specified port pin (0..1)
 240 */
 241 /**************************************************************************/
 242 uint32_t gpioGetValue (uint32_t portNum, uint32_t bitPos)
 243 {
 244   if (!_gpioInitialised) gpioInit();
 245
 246   uint32_t value = 0;
 247
 248   switch (portNum)
 249   {
 250     case 0:
 251       value = (GPIO_GPIO0DATA & (1 << bitPos)) ? 1 : 0;
 252       break;
 253     case 1:
 254       value = (GPIO_GPIO1DATA & (1 << bitPos)) ? 1 : 0;
 255       break;
 256     case 2:
 257       value = (GPIO_GPIO2DATA & (1 << bitPos)) ? 1 : 0;
 258       break;
 259     case 3:
 260       value = (GPIO_GPIO3DATA & (1 << bitPos)) ? 1 : 0;
 261       break;
 262     default:
 263       break;
 264   }
 265
 266   return value;
 267 }
 268
 269 /**************************************************************************/
 270 /*!
 271     @brief Sets the value for a specific port pin (only relevant when a
 272            pin is configured as output).
 273
 274     @param[in]  portNum
 275                 The port number (0..3)
 276     @param[in]  bitPos
 277                 The bit position (0..31)
 278     @param[in]  bitValue
 279                 The value to set for the specified bit (0..1).  0 will set
 280                 the pin low and 1 will set the pin high.
 281 */
 282 /**************************************************************************/
 283 inline void gpioSetValue (const uint32_t portNum, const uint32_t bitPos, const uint32_t bitVal)
 284 {
 285   if (!_gpioInitialised) gpioInit();
 286
 287   // Take advantage of the fact the GPIO registers are bit-banded
 288   (*(pREG32 ((GPIO_GPIO0_BASE + (portNum << 16)) + ((1 << bitPos) << 2)))) = bitVal ? 0xFFF : 0;
 289 }
 290
 291 /**************************************************************************/
 292 /*!
 293     @brief Sets the interrupt sense, event, etc.
 294
 295     @param[in]  portNum
 296                 The port number (0..3)
 297     @param[in]  bitPos
 298                 The bit position (0..31)
 299     @param[in]  sense
 300                 Whether the interrupt should be configured as edge or level
 301                 sensitive.
 302     @param[in]  edge
 303                 Whether one edge or both trigger an interrupt.
 304     @param[in]  event
 305                 Whether the rising or the falling edge (high or low)
 306                 should be used to trigger the interrupt.
 307
 308     @section Example
 309
 310     @code
 311     // Initialise gpio
 312     gpioInit();
 313     // Set GPIO1.8 to input
 314     gpioSetDir(1, 8, gpioDirection_Input);
 315     // Disable the internal pullup/down resistor on P1.8
 316     gpioSetPullup (&IOCON_PIO1_8, gpioPullupMode_Inactive);
 317     // Setup an interrupt on GPIO1.8
 318     gpioSetInterrupt(1,                               // Port
 319                      8,                               // Pin
 320                      gpioInterruptSense_Edge,         // Edge/Level Sensitive
 321                      gpioInterruptEdge_Single,        // Single/Double Edge
 322                      gpioInterruptEvent_ActiveHigh);  // Rising/Falling
 323     // Enable the interrupt
 324     gpioIntEnable(1, 8);
 325     @endcode
 326 */
 327 /**************************************************************************/
 328 void gpioSetInterrupt (uint32_t portNum, uint32_t bitPos, gpioInterruptSense_t sense, gpioInterruptEdge_t edge, gpioInterruptEvent_t event)
 329 {
 330   if (!_gpioInitialised) gpioInit();
 331
 332   // Get the appropriate register (handled this way to optimise code size)
 333   REG32 *gpiois  = &GPIO_GPIO0IS;   // Interrupt sense (edge or level sensitive)
 334   REG32 *gpioibe = &GPIO_GPIO0IBE;  // Interrupt both edges (0 = int controlled by GPIOIEV, 1 = both edges trigger interrupt)
 335   REG32 *gpioiev = &GPIO_GPIO0IEV;  // 0 = falling edge or low, 1 = rising edge or high (depending on GPIOIS)
 336   switch (portNum)
 337   {
 338     case 0:
 339       gpiois  = &GPIO_GPIO0IS;
 340       gpioibe = &GPIO_GPIO0IBE;
 341       gpioiev = &GPIO_GPIO0IEV;
 342       break;
 343     case 1:
 344       gpiois  = &GPIO_GPIO1IS;
 345       gpioibe = &GPIO_GPIO1IBE;
 346       gpioiev = &GPIO_GPIO1IEV;
 347       break;
 348     case 2:
 349       gpiois  = &GPIO_GPIO2IS;
 350       gpioibe = &GPIO_GPIO2IBE;
 351       gpioiev = &GPIO_GPIO2IEV;
 352       break;
 353     case 3:
 354       gpiois  = &GPIO_GPIO3IS;
 355       gpioibe = &GPIO_GPIO3IBE;
 356       gpioiev = &GPIO_GPIO3IEV;
 357       break;
 358   }
 359
 360   if (sense == gpioInterruptSense_Edge)
 361   {
 362     *gpiois &= ~(0x1<<bitPos);
 363     edge == gpioInterruptEdge_Single ? (*gpioibe &= ~(0x1<<bitPos)) : (*gpioibe |= (0x1<<bitPos));
 364   }
 365   else
 366   {
 367     *gpiois |= (0x1<<bitPos);
 368   }
 369
 370   event == gpioInterruptEvent_ActiveHigh ? (*gpioiev &= ~(0x1<<bitPos)) : (*gpioiev |= (0x1<<bitPos));
 371
 372   return;
 373 }
 374
 375 /**************************************************************************/
 376 /*!
 377     @brief Enables the interrupt mask for a specific port pin
 378
 379     @param[in]  portNum
 380                 The port number (0..3)
 381     @param[in]  bitPos
 382                 The bit position (0..31)
 383 */
 384 /**************************************************************************/
 385 void gpioIntEnable (uint32_t portNum, uint32_t bitPos)
 386 {
 387   if (!_gpioInitialised) gpioInit();
 388
 389   switch (portNum)
 390   {
 391     case 0:
 392       GPIO_GPIO0IE |= (0x1<<bitPos);
 393       break;
 394     case 1:
 395       GPIO_GPIO1IE |= (0x1<<bitPos);
 396       break;
 397     case 2:
 398       GPIO_GPIO2IE |= (0x1<<bitPos);
 399       break;
 400     case 3:
 401       GPIO_GPIO3IE |= (0x1<<bitPos);
 402       break;
 403     default:
 404       break;
 405   }
 406   return;
 407 }
 408
 409 /**************************************************************************/
 410 /*!
 411     @brief Disables the interrupt mask for a specific port pin
 412
 413     @param[in]  portNum
 414                 The port number (0..3)
 415     @param[in]  bitPos
 416                 The bit position (0..31)
 417 */
 418 /**************************************************************************/
 419 void gpioIntDisable (uint32_t portNum, uint32_t bitPos)
 420 {
 421   if (!_gpioInitialised) gpioInit();
 422
 423   switch (portNum)
 424   {
 425     case 0:
 426       GPIO_GPIO0IE &= ~(0x1<<bitPos);
 427       break;
 428     case 1:
 429       GPIO_GPIO1IE &= ~(0x1<<bitPos);
 430       break;
 431     case 2:
 432       GPIO_GPIO2IE &= ~(0x1<<bitPos);
 433       break;
 434     case 3:
 435       GPIO_GPIO3IE &= ~(0x1<<bitPos);
 436       break;
 437     default:
 438       break;
 439   }
 440   return;
 441 }
 442
 443 /**************************************************************************/
 444 /*!
 445     @brief Gets the interrupt status for a specific port pin
 446
 447     @param[in]  portNum
 448                 The port number (0..3)
 449     @param[in]  bitPos
 450                 The bit position (0..31)
 451
 452     @return     The interrupt status for the specified port pin (0..1)
 453 */
 454 /**************************************************************************/
 455 uint32_t gpioIntStatus (uint32_t portNum, uint32_t bitPos)
 456 {
 457   if (!_gpioInitialised) gpioInit();
 458
 459   uint32_t regVal = 0;
 460
 461   switch (portNum)
 462   {
 463     case 0:
 464       if (GPIO_GPIO0MIS & (0x1<<bitPos))
 465       {
 466         regVal = 1;
 467       }
 468       break;
 469     case 1:
 470       if (GPIO_GPIO1MIS & (0x1<<bitPos))
 471       {
 472         regVal = 1;
 473       }
 474       break;
 475     case 2:
 476       if (GPIO_GPIO2MIS & (0x1<<bitPos))
 477       {
 478         regVal = 1;
 479       }
 480       break;
 481     case 3:
 482       if (GPIO_GPIO3MIS & (0x1<<bitPos))
 483       {
 484         regVal = 1;
 485       }
 486       break;
 487     default:
 488       break;
 489   }
 490   return ( regVal );
 491 }
 492
 493 /**************************************************************************/
 494 /*!
 495     @brief Clears the interrupt for a port pin
 496
 497     @param[in]  portNum
 498                 The port number (0..3)
 499     @param[in]  bitPos
 500                 The bit position (0..31)
 501 */
 502 /**************************************************************************/
 503 void gpioIntClear (uint32_t portNum, uint32_t bitPos)
 504 {
 505   if (!_gpioInitialised) gpioInit();
 506
 507   switch (portNum)
 508   {
 509     case 0:
 510       GPIO_GPIO0IC |= (0x1<<bitPos);
 511     break;
 512     case 1:
 513       GPIO_GPIO1IC |= (0x1<<bitPos);
 514     break;
 515     case 2:
 516       GPIO_GPIO2IC |= (0x1<<bitPos);
 517     break;
 518     case 3:
 519       GPIO_GPIO3IC |= (0x1<<bitPos);
 520     break;
 521     default:
 522       break;
 523   }
 524   return;
 525 }
 526
 527 /**************************************************************************/
 528 /*!
 529     @brief Configures the internal pullup/down resistor for GPIO pins
 530            (only relevant for pins configured as inputs)
 531
 532     @param[in]  ioconReg
 533                 A pointer to the IOCON registry value corresponding to
 534                 the pin you wish to change (for example: &IOCON_PIO2_0
 535                 for GPIO pin 2.0).
 536     @param[in]  mode
 537                 The 'mode' that the pin should be set to, which must be
 538                 correspond to a value defined in gpioPullupMode_t
 539
 540     @warning    By default, all GPIO pins have the internal pull-up
 541                 resistor enabled.  This may cause unusual behaviour if
 542                 care isn't taken to set the internal resistor to an
 543                 appropriate state.
 544
 545     @section Example
 546
 547     @code
 548     // Initialise gpio
 549     gpioInit();
 550     // Set GPIO1.8 to input
 551     gpioSetDir(1, 8, gpioDirection_Input);
 552     // Disable the internal pullup/down resistor on P1.8
 553     gpioSetPullup(&IOCON_PIO1_8, gpioPullupMode_Inactive);
 554     @endcode
 555 */
 556 /**************************************************************************/
 557 void gpioSetPullup (volatile uint32_t *ioconReg, gpioPullupMode_t mode)
 558 {
 559   if (!_gpioInitialised) gpioInit();
 560
 561   // ToDo: Disable interrupts while we are doing this?
 562
 563   *ioconReg &= ~(IOCON_COMMON_MODE_MASK);
 564   *ioconReg |= mode;
 565
 566   // ToDo: Re-enable interrupts?
 567 };