Levelreihenfolge, -fixes.
[hackover2013-badge-firmware.git] / drivers / adc / ads1015 / ads1015.h
1 /**************************************************************************/
2 /*!
3 @file ads1015.h
4 @author K. Townsend (microBuilder.eu)
5
6 @section LICENSE
7
8 Software License Agreement (BSD License)
9
10 Copyright (c) 2012, K. Townsend
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35 /**************************************************************************/
36
37 #ifndef _ADS1015_H_
38 #define _ADS1015_H_
39
40 #include "projectconfig.h"
41 #include "core/i2c/i2c.h"
42
43 /*=========================================================================
44 I2C ADDRESS/BITS
45 -----------------------------------------------------------------------*/
46 #define ADS1015_ADDRESS (0x90) // 1001 000 shifted left 1 bit = 0x90 (ADDR = GND)
47 #define ADS1015_READBIT (0x01)
48 /*=========================================================================*/
49
50 /*=========================================================================
51 POINTER REGISTER
52 -----------------------------------------------------------------------*/
53 #define ADS1015_REG_POINTER_MASK (0x03)
54 #define ADS1015_REG_POINTER_CONVERT (0x00)
55 #define ADS1015_REG_POINTER_CONFIG (0x01)
56 #define ADS1015_REG_POINTER_LOWTHRESH (0x02)
57 #define ADS1015_REG_POINTER_HITHRESH (0x03)
58 /*=========================================================================*/
59
60 /*=========================================================================
61 CONFIG REGISTER
62 -----------------------------------------------------------------------*/
63 #define ADS1015_REG_CONFIG_OS_MASK (0x8000)
64 #define ADS1015_REG_CONFIG_OS_SINGLE (0x8000) // Write: Set to start a single-conversion
65 #define ADS1015_REG_CONFIG_OS_BUSY (0x0000) // Read: Bit = 0 when conversion is in progress
66 #define ADS1015_REG_CONFIG_OS_NOTBUSY (0x8000) // Read: Bit = 1 when device is not performing a conversion
67
68 #define ADS1015_REG_CONFIG_MUX_MASK (0x7000)
69 #define ADS1015_REG_CONFIG_MUX_DIFF_0_1 (0x0000) // Differential P = AIN0, N = AIN1 (default)
70 #define ADS1015_REG_CONFIG_MUX_DIFF_0_3 (0x1000) // Differential P = AIN0, N = AIN3
71 #define ADS1015_REG_CONFIG_MUX_DIFF_1_3 (0x2000) // Differential P = AIN1, N = AIN3
72 #define ADS1015_REG_CONFIG_MUX_DIFF_2_3 (0x3000) // Differential P = AIN2, N = AIN3
73 #define ADS1015_REG_CONFIG_MUX_SINGLE_0 (0x4000) // Single-ended AIN0
74 #define ADS1015_REG_CONFIG_MUX_SINGLE_1 (0x5000) // Single-ended AIN1
75 #define ADS1015_REG_CONFIG_MUX_SINGLE_2 (0x6000) // Single-ended AIN2
76 #define ADS1015_REG_CONFIG_MUX_SINGLE_3 (0x7000) // Single-ended AIN3
77
78 #define ADS1015_REG_CONFIG_PGA_MASK (0x0E00)
79 #define ADS1015_REG_CONFIG_PGA_6_144V (0x0000) // +/-6.144V range
80 #define ADS1015_REG_CONFIG_PGA_4_096V (0x0200) // +/-4.096V range
81 #define ADS1015_REG_CONFIG_PGA_2_048V (0x0400) // +/-2.048V range (default)
82 #define ADS1015_REG_CONFIG_PGA_1_024V (0x0600) // +/-1.024V range
83 #define ADS1015_REG_CONFIG_PGA_0_512V (0x0800) // +/-0.512V range
84 #define ADS1015_REG_CONFIG_PGA_0_256V (0x0A00) // +/-0.256V range
85
86 #define ADS1015_REG_CONFIG_MODE_MASK (0x0100)
87 #define ADS1015_REG_CONFIG_MODE_CONTIN (0x0000) // Continuous conversion mode
88 #define ADS1015_REG_CONFIG_MODE_SINGLE (0x0100) // Power-down single-shot mode (default)
89
90 #define ADS1015_REG_CONFIG_DR_MASK (0x00E0)
91 #define ADS1015_REG_CONFIG_DR_128SPS (0x0000) // 128 samples per second
92 #define ADS1015_REG_CONFIG_DR_250SPS (0x0020) // 250 samples per second
93 #define ADS1015_REG_CONFIG_DR_490SPS (0x0040) // 490 samples per second
94 #define ADS1015_REG_CONFIG_DR_920SPS (0x0050) // 920 samples per second
95 #define ADS1015_REG_CONFIG_DR_1600SPS (0x0080) // 1600 samples per second (default)
96 #define ADS1015_REG_CONFIG_DR_2400SPS (0x00A0) // 2400 samples per second
97 #define ADS1015_REG_CONFIG_DR_3300SPS (0x00C0) // 3300 samples per second
98
99 #define ADS1015_REG_CONFIG_CMODE_MASK (0x0010)
100 #define ADS1015_REG_CONFIG_CMODE_TRAD (0x0000) // Traditional comparator with hysteresis (default)
101 #define ADS1015_REG_CONFIG_CMODE_WINDOW (0x0010) // Window comparator
102
103 #define ADS1015_REG_CONFIG_CPOL_MASK (0x0008)
104 #define ADS1015_REG_CONFIG_CPOL_ACTVLOW (0x0000) // ALERT/RDY pin is low when active (default)
105 #define ADS1015_REG_CONFIG_CPOL_ACTVHI (0x0008) // ALERT/RDY pin is high when active
106
107 #define ADS1015_REG_CONFIG_CLAT_MASK (0x0004) // Determines if ALERT/RDY pin latches once asserted
108 #define ADS1015_REG_CONFIG_CLAT_NONLAT (0x0000) // Non-latching comparator (default)
109 #define ADS1015_REG_CONFIG_CLAT_LATCH (0x0004) // Latching comparator
110
111 #define ADS1015_REG_CONFIG_CQUE_MASK (0x0003)
112 #define ADS1015_REG_CONFIG_CQUE_1CONV (0x0000) // Assert ALERT/RDY after one conversions
113 #define ADS1015_REG_CONFIG_CQUE_2CONV (0x0001) // Assert ALERT/RDY after two conversions
114 #define ADS1015_REG_CONFIG_CQUE_4CONV (0x0002) // Assert ALERT/RDY after four conversions
115 #define ADS1015_REG_CONFIG_CQUE_NONE (0x0003) // Disable the comparator and put ALERT/RDY in high state (default)
116 /*=========================================================================*/
117
118 typedef enum
119 {
120 ADS1015_ERROR_OK = 0, // Everything executed normally
121 ADS1015_ERROR_I2CINIT, // Unable to initialise I2C
122 ADS1015_ERROR_I2CBUSY, // I2C already in use
123 ADS1015_ERROR_INVALIDCHANNEL, // Invalid channel specified
124 ADS1015_ERROR_LAST
125 }
126 ads1015Error_t;
127
128 ads1015Error_t ads1015Init(void);
129 ads1015Error_t ads1015ReadADC_SingleEnded(uint8_t channel, uint16_t *value);
130 ads1015Error_t ads1015ReadADC_Differential_0_1(int16_t *value);
131 ads1015Error_t ads1015ReadADC_Differential_2_3(int16_t *value);
132 ads1015Error_t ads1015StartComparator_SingleEnded(uint8_t channel, int16_t threshold);
133 ads1015Error_t ads1015GetLastConversionResults(int16_t *value);
134
135 #endif
136
137
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