core/timer32/timer32.c

   1 /**************************************************************************/
   2 /*!
   3     @file     timer32.c
   4     @author   K. Townsend (microBuilder.eu)
   5     @date     22 March 2010
   6     @version  0.10
   7
   8     @section DESCRIPTION
   9
  10     Generic code for 32-bit timers.  By default, the timers are configured
  11     to generate an interrupt once every 100 microseconds, incrementing a
  12     global variable once per tick.
  13
  14     @warning  Please note that the ROM-based USB drivers on the LPC1343
  15               require the use of 32-bit Timer 1.  If you plan on using the
  16               ROM-based USB functionality, you should restrict your timer
  17               usage to 32-bit timer 0.
  18
  19     @section Example
  20
  21     @code
  22     #include "/core/cpu/cpu.h"
  23     #include "/core/timer32/timer32.h"
  24     ...
  25     cpuInit();
  26
  27     // Initialise 32-bit timer 0 with 100uS ticks
  28     timer32Init(0, TIMER32_DEFAULTINTERVAL);
  29
  30     // Enable timer 0
  31     timer32Enable(0);
  32
  33     // Cause a blocking delay for 1 second (1000mS)
  34     timer32Delay(0, TIMER32_DELAY_1MS * 1000);
  35     @endcode
  36
  37     @section LICENSE
  38
  39     Software License Agreement (BSD License)
  40
  41     Copyright (c) 2010, microBuilder SARL
  42     All rights reserved.
  43
  44     Redistribution and use in source and binary forms, with or without
  45     modification, are permitted provided that the following conditions are met:
  46     1. Redistributions of source code must retain the above copyright
  47     notice, this list of conditions and the following disclaimer.
  48     2. Redistributions in binary form must reproduce the above copyright
  49     notice, this list of conditions and the following disclaimer in the
  50     documentation and/or other materials provided with the distribution.
  51     3. Neither the name of the copyright holders nor the
  52     names of its contributors may be used to endorse or promote products
  53     derived from this software without specific prior written permission.
  54
  55     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  56     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  57     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  58     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  59     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  60     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  61     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  62     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  64     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65 */
  66 /**************************************************************************/
  67
  68 #include "timer32.h"
  69
  70 volatile uint32_t timer32_0_counter = 0;
  71 volatile uint32_t timer32_1_counter = 0;
  72
  73 /**************************************************************************/
  74 /*!
  75     @brief      Causes a blocking delay for the specified number of
  76                 timer ticks.  The duration of each 'tick' is determined by
  77                 the 'timerInterval' property supplied to timer32Init.
  78
  79     @param[in]  timerNum
  80                 The 32-bit timer to user (0..1)
  81     @param[in]  delay
  82                 The number of counter increments to wait
  83 */
  84 /**************************************************************************/
  85 void timer32Delay(uint8_t timerNum, uint32_t delay)
  86 {
  87   uint32_t curTicks;
  88
  89   if (timerNum == 0)
  90   {
  91     curTicks = timer32_0_counter;
  92     if (curTicks > 0xFFFFFFFF - delay)
  93     {
  94       // Rollover will occur during delay
  95       while (timer32_0_counter >= curTicks)
  96       {
  97         while (timer32_0_counter < (delay - (0xFFFFFFFF - curTicks)));
  98       }
  99     }
 100     else
 101     {
 102       while ((timer32_0_counter - curTicks) < delay);
 103     }
 104   }
 105
 106   else if (timerNum == 1)
 107   {
 108     curTicks = timer32_1_counter;
 109     if (curTicks > 0xFFFFFFFF - delay)
 110     {
 111       // Rollover will occur during delay
 112       while (timer32_1_counter >= curTicks)
 113       {
 114         while (timer32_1_counter < (delay - (0xFFFFFFFF - curTicks)));
 115       }
 116     }
 117     else
 118     {
 119       while ((timer32_1_counter - curTicks) < delay);
 120     }
 121   }
 122
 123   return;
 124 }
 125
 126 /**************************************************************************/
 127 /*!
 128     @brief Interrupt handler for 32-bit timer 0
 129 */
 130 /**************************************************************************/
 131 void TIMER32_0_IRQHandler(void)
 132 {
 133   /* Clear the interrupt flag */
 134   TMR_TMR32B0IR = TMR_TMR32B0IR_MR0;
 135
 136   /* If you wish to perform some action after each timer 'tick' (such as
 137      incrementing a counter variable) you can do so here */
 138   timer32_0_counter++;
 139
 140   return;
 141 }
 142
 143 /**************************************************************************/
 144 /*!
 145         @brief Interrupt handler for 32-bit timer 1
 146 */
 147 /**************************************************************************/
 148 void TIMER32_1_IRQHandler(void)
 149 {
 150   /* Clear the interrupt flag */
 151   TMR_TMR32B1IR = TMR_TMR32B1IR_MR0;
 152
 153   /* If you wish to perform some action after each timer 'tick' (such as
 154      incrementing a counter variable) you can do so here */
 155   timer32_1_counter++;
 156
 157   return;
 158 }
 159
 160 /**************************************************************************/
 161 /*!
 162     @brief Enables the specified timer
 163
 164     @param[in]  timerNum
 165                 The 32-bit timer to enable (0..1)
 166 */
 167 /**************************************************************************/
 168 void timer32Enable(uint8_t timerNum)
 169 {
 170   if ( timerNum == 0 )
 171   {
 172     TMR_TMR32B0TCR = TMR_TMR32B0TCR_COUNTERENABLE_ENABLED;
 173   }
 174
 175   else if (timerNum == 1)
 176   {
 177     TMR_TMR32B1TCR = TMR_TMR32B1TCR_COUNTERENABLE_ENABLED;
 178   }
 179
 180   return;
 181 }
 182
 183 /**************************************************************************/
 184 /*!
 185     @brief Disables the specified timer
 186
 187     @param[in]  timerNum
 188                 The 32-bit timer to disable (0..1)
 189 */
 190 /**************************************************************************/
 191 void timer32Disable(uint8_t timerNum)
 192 {
 193   if ( timerNum == 0 )
 194   {
 195     TMR_TMR32B0TCR = TMR_TMR32B0TCR_COUNTERENABLE_DISABLED;
 196   }
 197
 198   else if (timerNum == 1)
 199   {
 200     TMR_TMR32B1TCR = TMR_TMR32B1TCR_COUNTERENABLE_DISABLED;
 201   }
 202
 203   return;
 204 }
 205
 206 /**************************************************************************/
 207 /*!
 208     @brief Resets the specified timer
 209
 210     @param[in]  timerNum
 211                 The 32-bit timer to reset (0..1)
 212 */
 213 /**************************************************************************/
 214 void timer32Reset(uint8_t timerNum)
 215 {
 216   uint32_t regVal;
 217
 218   if ( timerNum == 0 )
 219   {
 220     regVal = TMR_TMR32B0TCR;
 221     regVal |= TMR_TMR32B0TCR_COUNTERRESET_ENABLED;
 222     TMR_TMR32B0TCR = regVal;
 223   }
 224
 225   else if (timerNum == 1)
 226   {
 227     regVal = TMR_TMR32B1TCR;
 228     regVal |= TMR_TMR32B1TCR_COUNTERRESET_ENABLED;
 229     TMR_TMR32B1TCR = regVal;
 230   }
 231
 232   return;
 233 }
 234
 235 /**************************************************************************/
 236 /*!
 237     @brief  Initialises the specified 32-bit timer, and configures the
 238             timer to raise an interrupt and reset on match on MR0.
 239
 240     @param[in]  timerNum
 241                 The 32-bit timer to initiliase (0..1)
 242     @param[in]  timerInterval
 243                 The number of clock 'ticks' between resets (0..0xFFFFFFFF)
 244
 245     @note   Care needs to be taken when configuring the timers since the
 246             pins are all multiplexed with other peripherals.  This code is
 247             provided as a starting point, but it will need to be adjusted
 248             according to your own situation and pin/peripheral requirements
 249 */
 250 /**************************************************************************/
 251 void timer32Init(uint8_t timerNum, uint32_t timerInterval)
 252 {
 253   // If timerInterval is invalid, use the default value
 254   if (timerInterval < 1)
 255   {
 256     timerInterval = TIMER32_DEFAULTINTERVAL;
 257   }
 258
 259   if ( timerNum == 0 )
 260   {
 261     /* Enable the clock for CT32B0 */
 262     SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT32B0);
 263
 264     /* The physical pins associated with CT32B0 are not enabled by
 265        default in order to avoid conflicts with other peripherals.  If
 266        you wish to use any of the pin-dependant functionality, simply
 267        uncomment the appropriate lines below.                             */
 268
 269     /* Configure PIO1.5 as Timer0_32 CAP0 */
 270     // IOCON_PIO1_5 &= ~IOCON_PIO1_5_FUNC_MASK;
 271     // IOCON_PIO1_5 |= IOCON_PIO1_5_FUNC_CT32B0_CAP0;
 272
 273     /* Configure PIO1.6 as Timer0_32 MAT0 */
 274     // IOCON_PIO1_6 &= ~IOCON_PIO1_6_FUNC_MASK;
 275     // IOCON_PIO1_6 |= IOCON_PIO1_6_FUNC_CT32B0_MAT0;
 276
 277     /* Configure PIO1.7 as Timer0_32 MAT1 */
 278     // IOCON_PIO1_7 &= ~IOCON_PIO1_7_FUNC_MASK;
 279     // IOCON_PIO1_7 |= IOCON_PIO1_7_FUNC_CT32B0_MAT1;
 280
 281     /* Configure PIO0.1 as Timer0_32 MAT2 */
 282     // IOCON_PIO0_1 &= ~IOCON_PIO0_1_FUNC_MASK;
 283     // IOCON_PIO0_1 |= IOCON_PIO0_1_FUNC_CT32B0_MAT2;
 284
 285     /* Configure PIO0.11 as Timer0_32 MAT3 */
 286     /* Note: This pint can not be used with JTAG/SWD */
 287     // IOCON_JTAG_TDI_PIO0_11 &= ~IOCON_JTAG_TDI_PIO0_11_FUNC_MASK;
 288     // IOCON_JTAG_TDI_PIO0_11 |= IOCON_JTAG_TDI_PIO0_11_FUNC_CT32B0_MAT3;
 289
 290     timer32_0_counter = 0;
 291     TMR_TMR32B0MR0 = timerInterval;
 292
 293     /* Configure match control register to raise an interrupt and reset on MR0 */
 294     TMR_TMR32B0MCR = (TMR_TMR32B0MCR_MR0_INT_ENABLED | TMR_TMR32B0MCR_MR0_RESET_ENABLED);
 295
 296     /* Enable the TIMER0 interrupt */
 297     NVIC_EnableIRQ(TIMER_32_0_IRQn);
 298   }
 299
 300   else if ( timerNum == 1 )
 301   {
 302     /* Enable the clock for CT32B1 */
 303     SCB_SYSAHBCLKCTRL |= (SCB_SYSAHBCLKCTRL_CT32B1);
 304
 305     /* The physical pins associated with CT32B0 are not enabled by
 306        default in order to avoid conflicts with other peripherals.        */
 307
 308     /* Configure PIO1.0 as Timer1_32 CAP0 */
 309     /* Note: This pint can not be used with JTAG/SWD */
 310     // IOCON_JTAG_TMS_PIO1_0 &= ~IOCON_JTAG_TMS_PIO1_0_FUNC_MASK;
 311     // IOCON_JTAG_TMS_PIO1_0 |= IOCON_JTAG_TMS_PIO1_0_FUNC_CT32B1_CAP0;
 312
 313     /* Configure PIO1.1 as Timer1_32 MAT0 */
 314     /* Note: This pint can not be used with JTAG/SWD */
 315     // IOCON_JTAG_TDO_PIO1_1 &= ~IOCON_JTAG_TDO_PIO1_1_FUNC_MASK;
 316     // IOCON_JTAG_TDO_PIO1_1 |= IOCON_JTAG_TDO_PIO1_1_FUNC_CT32B1_MAT0;
 317
 318     /* Configure PIO1.2 as Timer1_32 MAT1 */
 319     /* Note: This pint can not be used with JTAG/SWD */
 320     // IOCON_JTAG_nTRST_PIO1_2 &= ~IOCON_JTAG_nTRST_PIO1_2_FUNC_MASK;
 321     // IOCON_JTAG_nTRST_PIO1_2 |= IOCON_JTAG_nTRST_PIO1_2_FUNC_CT32B1_MAT1;
 322
 323     /* Configure PIO1.3 as Timer1_32 MAT2 */
 324     /* Note: This pint can not be used with JTAG/SWD */
 325     // IOCON_SWDIO_PIO1_3 &= ~IOCON_SWDIO_PIO1_3_FUNC_MASK;
 326     // IOCON_SWDIO_PIO1_3 |= IOCON_SWDIO_PIO1_3_FUNC_CT32B1_MAT2;
 327
 328     /* Configure PIO1.4 as Timer1_32 MAT3 */
 329     // IOCON_PIO1_4 &= ~IOCON_PIO1_4_FUNC_MASK;
 330     // IOCON_PIO1_4 |= IOCON_PIO1_4_FUNC_CT32B1_MAT3;
 331
 332     timer32_1_counter = 0;
 333     TMR_TMR32B1MR0 = timerInterval;
 334
 335     /* Configure match control register to raise an interrupt and reset on MR0 */
 336     TMR_TMR32B1MCR = (TMR_TMR32B1MCR_MR0_INT_ENABLED | TMR_TMR32B1MCR_MR0_RESET_ENABLED);
 337
 338     /* Enable the TIMER1 Interrupt */
 339     NVIC_EnableIRQ(TIMER_32_1_IRQn);
 340   }
 341   return;
 342 }
 343
 344