target/linux/lantiq/patches-3.2/0064-MIPS-lantiq-fixes-danube-clock.patch

   1 From 1303ac4fbe98c7132717102223089dc10d0ab4a2 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 19 Mar 2012 15:53:37 +0100
   4 Subject: [PATCH 64/70] MIPS: lantiq: fixes danube clock
   5
   6 ---
   7  arch/mips/lantiq/xway/clk.c |   20 ++++++++++----------
   8  1 files changed, 10 insertions(+), 10 deletions(-)
   9
  10 diff --git a/arch/mips/lantiq/xway/clk.c b/arch/mips/lantiq/xway/clk.c
  11 index 2bafc04..5d850dc 100644
  12 --- a/arch/mips/lantiq/xway/clk.c
  13 +++ b/arch/mips/lantiq/xway/clk.c
  14 @@ -181,7 +181,7 @@ unsigned long ltq_danube_io_region_clock(void)
  15  {
  16         unsigned int ret = ltq_get_pll0_fosc();
  17
  18 -       switch (ltq_cgu_r32(LTQ_CGU_PLL2_CFG) & CGU_SYS_DDR_SEL) {
  19 +       switch (ltq_cgu_r32(LTQ_CGU_SYS) & 0x3) {
  20         default:
  21         case 0:
  22                 return (ret + 1) / 2;
  23 @@ -203,6 +203,15 @@ unsigned long ltq_danube_fpi_bus_clock(int fpi)
  24         return ret;
  25  }
  26
  27 +unsigned long ltq_danube_fpi_hz(void)
  28 +{
  29 +       unsigned long ddr_clock = DDR_HZ;
  30 +
  31 +       if (ltq_cgu_r32(LTQ_CGU_SYS) & 0x40)
  32 +               return ddr_clock >> 1;
  33 +       return ddr_clock;
  34 +}
  35 +
  36  unsigned long ltq_danube_cpu_hz(void)
  37  {
  38         switch (ltq_cgu_r32(LTQ_CGU_SYS) & 0xc) {
  39 @@ -241,15 +250,6 @@ unsigned long ltq_ar9_cpu_hz(void)
  40                 return ltq_ar9_sys_hz();
  41  }
  42
  43 -unsigned long ltq_danube_fpi_hz(void)
  44 -{
  45 -       unsigned long ddr_clock = DDR_HZ;
  46 -
  47 -       if (ltq_cgu_r32(LTQ_CGU_SYS) & 0x40)
  48 -               return ddr_clock >> 1;
  49 -       return ddr_clock;
  50 -}
  51 -
  52  unsigned long ltq_vr9_cpu_hz(void)
  53  {
  54         unsigned int cpu_sel;
  55 --
  56 1.7.7.1
  57