1 /**************************************************************************/
4 @author K. Townsend (microBuilder.eu)
8 Software License Agreement (BSD License)
10 Copyright (c) 2010, microBuilder SARL
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 /**************************************************************************/
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
43 /*=========================================================================
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
51 CFG_BRD_LPC1343_REFDESIGN
52 =========================
54 microBuilder.eu LPC1343 Reference Design base board with
55 on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
57 This is the recommended starting point for new development
58 since it makes it easy to send printf output to USB CDC, access
59 the on-board EEPROM, etc.
61 CFG_BRD_LPC1343_REFDESIGN_MINIMAL
62 =================================
64 microBuilder.eu LPC1343 Reference Design base board with
65 only the most common peripherals initialised by default.
67 Results in smallest code since EEPROM, USB, etc., are not
68 initialised on startup. By default, only the following
69 peripherals are initialised by systemInit():
71 - CPU (Configures the PLL, etc.)
74 - UART (with printf support) *
76 * Can be removed to save 0.8kb in debug and 0.3 kb in
77 release. Comment out 'CFG_PRINTF_UART' to disable it.
79 The code size can be further reduced by several KB by removing
80 any IRQ Handlers that are not used. The I2C IRQHandler, for
81 example, uses ~1KB of flash in debug and ~400KB in release mode,
82 but because it is referenced in the startup code it is always
83 included even if I2C is never used in the project.
85 Other IRQ Handlers that you might be able to comment out
86 to save some space are:
88 IRQ Handler Debug Release
89 ------------------------- ------ -------
90 I2C_IRQHandler 1160 b 400 b
91 SSP_IRQHandler 160 b 76 b
92 UART_IRQHandler 246 b 116 b
93 WAKEUP_IRQHandler 160 b 100 b
94 WDT_IRQHandler 50 b 28 b
96 CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
97 ====================================
99 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
100 for the CLI interface.
102 CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
103 =====================================
105 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
106 for the CLI interface.
108 CFG_BRD_LPC1343_802154USBSTICK
109 ==============================
111 microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
113 -----------------------------------------------------------------------*/
114 #define CFG_BRD_LPC1343_REFDESIGN
115 // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
116 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
117 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
118 // #define CFG_BRD_LPC1343_802154USBSTICK
119 // #define CFG_BRD_LPC1343_OLIMEX_P
120 /*=========================================================================*/
123 /**************************************************************************
125 -----------------------------------------------------------------------
126 This table tries to give an indication of which GPIO pins and
127 peripherals are used by the available drivers and SW examples. Only
128 dedicated GPIO pins available on the LPC1343 Reference Board are shown
129 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
130 also be used as GPIO if they are available.
133 ========= ================= =======
134 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
136 SDCARD . . . . . . . . . . . . . X . . .
137 PWM . X . . . . . . . . . . . . . . .
138 STEPPER . . . . . . . . . . . . . X X X X
139 CHIBI X X X . . . . . . . . . . . . . .
140 ILI9325/8 X X X X X X X X X X X X X . . . X
141 ST7565 X X X X X X X X X X X X X . . . X
142 ST7735 . . . . X X X X X X . . . . . . .
143 SHARPMEM . . . . X X X X . . . . . . . . .
144 SSD1306 . . . . X X X . X X . . . . . . .
145 SSD1351 . . . . X X X X X . . . . . . . .
146 MCP121 . . . . . . . . . . . . . . X . .
147 PN532 [3] . . . . . . . . . . . . . . X X .
150 ====================== === ======= ====
151 16B0 16B1 32B0 32B1 0 0 1 2 3 0
153 SDCARD . . . . X . . . . .
154 PWM . X . . . . . . . .
155 PMU [1] . . X . . . . . . .
156 USB . . . X . . . . . .
157 STEPPER . . X . . . . . . .
158 CHIBI x . . . X . . . . .
159 ILI9325/8 . . . . . X X X X .
160 ST7565 . . . . . X X X X .
161 ST7535 . . . . . . . . . .
162 SHARPMEM . . . . . . . . . .
163 SSD1306 . . . . . . . . . .
164 INTERFACE . . . . . . . . . X[2]
166 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
167 can safely be used by other peripherals, but may need to be
168 reconfigured when you wakeup from deep-sleep.
169 [2] INTERFACE can be configured to use either USBCDC or UART
170 [3] 3.2 only used when with the I2C bus (for IRQ)
172 **************************************************************************/
175 /**************************************************************************
177 -----------------------------------------------------------------------
178 The following addresses are used by the different I2C sensors included
183 ISL12022M (RTC) 0xDE 1101111x
184 ISL12022M (SRAM) 0xAE 1010111x
186 MCP24AA 0xA0 1010000x
187 MCP4725 0xC0 1100000x
188 TSL2561 0x72 0111001x
189 TCS3414 0x72 0111001x
192 [1] Alternative addresses may exists, but the addresses listed in this
193 table are the values used in the code base
195 **************************************************************************/
198 /*=========================================================================
199 FIRMWARE VERSION SETTINGS
200 -----------------------------------------------------------------------*/
201 #define CFG_FIRMWARE_VERSION_MAJOR (0)
202 #define CFG_FIRMWARE_VERSION_MINOR (9)
203 #define CFG_FIRMWARE_VERSION_REVISION (8)
204 /*=========================================================================*/
207 /*=========================================================================
209 -----------------------------------------------------------------------
211 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
212 be modified to change the clock speed, but the value
213 should be indicated here since CFG_CPU_CCLK is used by
214 other peripherals to determine timing.
216 -----------------------------------------------------------------------*/
217 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
218 /*=========================================================================*/
221 /*=========================================================================
223 -----------------------------------------------------------------------
225 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
226 of the systick timer.
228 -----------------------------------------------------------------------*/
229 #define CFG_SYSTICK_DELAY_IN_MS (1)
230 /*=========================================================================*/
233 /*=========================================================================
235 -----------------------------------------------------------------------
237 CFG_ALTRESET If defined, indicates that a GPIO pin should be
238 configured as an alternate reset pin in addition
239 to the dedicated reset pin.
240 CFG_ALTRESET_PORT The GPIO port where the alt reset pin is located
241 CFG_ALTRESET_PIN The GPIO pin where the alt reset pin is located
243 -----------------------------------------------------------------------*/
244 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
246 #define CFG_ALTRESET_PORT (1)
247 #define CFG_ALTRESET_PIN (5) // P1.5 = RTS
249 /*=========================================================================*/
252 /*=========================================================================
254 -----------------------------------------------------------------------
256 CFG_UART_BAUDRATE The default UART speed. This value is used
257 when initialising UART, and should be a
258 standard value like 57600, 9600, etc.
259 NOTE: This value may be overridden if
260 another value is stored in EEPROM!
261 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
262 will determine the maximum number of received
263 characters to store in memory.
265 -----------------------------------------------------------------------*/
266 #ifdef CFG_BRD_LPC1343_REFDESIGN
267 #define CFG_UART_BAUDRATE (115200)
268 #define CFG_UART_BUFSIZE (512)
271 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
272 #define CFG_UART_BAUDRATE (115200)
273 #define CFG_UART_BUFSIZE (512)
276 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
277 #define CFG_UART_BAUDRATE (115200)
278 #define CFG_UART_BUFSIZE (512)
281 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
282 #define CFG_UART_BAUDRATE (57600)
283 #define CFG_UART_BUFSIZE (512)
286 #ifdef CFG_BRD_LPC1343_802154USBSTICK
287 #define CFG_UART_BAUDRATE (115200)
288 #define CFG_UART_BUFSIZE (512)
291 #ifdef CFG_BRD_LPC1343_OLIMEX_P
292 #define CFG_UART_BAUDRATE (115200)
293 #define CFG_UART_BUFSIZE (512)
295 /*=========================================================================*/
298 /*=========================================================================
300 -----------------------------------------------------------------------
302 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
305 -----------------------------------------------------------------------*/
306 #ifdef CFG_BRD_LPC1343_REFDESIGN
307 #define CFG_SSP0_SCKPIN_2_11
308 // #define CFG_SSP0_SCKPIN_0_6
311 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
312 #define CFG_SSP0_SCKPIN_2_11
313 // #define CFG_SSP0_SCKPIN_0_6
316 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
317 #define CFG_SSP0_SCKPIN_2_11
318 // #define CFG_SSP0_SCKPIN_0_6
321 #ifdef CFG_BRD_LPC1343_802154USBSTICK
322 // #define CFG_SSP0_SCKPIN_2_11
323 #define CFG_SSP0_SCKPIN_0_6
326 #ifdef CFG_BRD_LPC1343_OLIMEX_P
327 #define CFG_SSP0_SCKPIN_2_11
328 // #define CFG_SSP0_SCKPIN_0_6
330 /*=========================================================================*/
333 /*=========================================================================
335 -----------------------------------------------------------------------
337 ADC_AVERAGING_ENABLE To get better results, the ADC code can take
338 a number of samples and return the average
339 value. This is slower, but can give more
340 accurate results caused of single-reading
342 To enable average, set ADC_AVERAGING_ENABLE
344 ADC_AVERAGING_SAMPLES The number of ADC samples to read and
345 average if ADC averaging is enabled.
347 -----------------------------------------------------------------------*/
348 #ifdef CFG_BRD_LPC1343_REFDESIGN
349 #define ADC_AVERAGING_ENABLE (1)
350 #define ADC_AVERAGING_SAMPLES (5)
353 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
354 #define ADC_AVERAGING_ENABLE (1)
355 #define ADC_AVERAGING_SAMPLES (5)
358 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
359 #define ADC_AVERAGING_ENABLE (0)
360 #define ADC_AVERAGING_SAMPLES (5)
363 #ifdef CFG_BRD_LPC1343_802154USBSTICK
364 #define ADC_AVERAGING_ENABLE (0)
365 #define ADC_AVERAGING_SAMPLES (5)
368 #ifdef CFG_BRD_LPC1343_OLIMEX_P
369 #define ADC_AVERAGING_ENABLE (0)
370 #define ADC_AVERAGING_SAMPLES (5)
372 /*=========================================================================*/
375 /*=========================================================================
377 -----------------------------------------------------------------------
379 CFG_LED_PORT The port for the on board LED
380 CFG_LED_PIN The pin for the on board LED
381 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
382 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
384 -----------------------------------------------------------------------*/
385 #ifdef CFG_BRD_LPC1343_REFDESIGN
386 #define CFG_LED_PORT (2)
387 #define CFG_LED_PIN (10)
388 #define CFG_LED_ON (0)
389 #define CFG_LED_OFF (1)
392 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
393 #define CFG_LED_PORT (2)
394 #define CFG_LED_PIN (10)
395 #define CFG_LED_ON (0)
396 #define CFG_LED_OFF (1)
399 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
400 #define CFG_LED_PORT (2)
401 #define CFG_LED_PIN (10)
402 #define CFG_LED_ON (0)
403 #define CFG_LED_OFF (1)
406 #ifdef CFG_BRD_LPC1343_802154USBSTICK
407 #define CFG_LED_PORT (3)
408 #define CFG_LED_PIN (2)
409 #define CFG_LED_ON (0)
410 #define CFG_LED_OFF (1)
413 #ifdef CFG_BRD_LPC1343_OLIMEX_P
414 #define CFG_LED_PORT (3)
415 #define CFG_LED_PIN (2)
416 #define CFG_LED_ON (0)
417 #define CFG_LED_OFF (1)
419 /*=========================================================================*/
422 /*=========================================================================
424 -----------------------------------------------------------------------
426 CFG_SDCARD If this field is defined SD Card and FAT32
427 file system support will be included
428 CFG_SDCARD_READONLY If this is set to 1, all commands to
429 write to the SD card will be removed
430 saving some flash space.
431 CFG_SDCARD_CDPORT The card detect port number
432 CFG_SDCARD_CDPIN The card detect pin number
434 NOTE: All config settings for FAT32 are defined
437 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
438 ~300KB/s (w/512 byte read buffer)
440 PIN LAYOUT: The pin layout that is used by this driver
441 can be seen in the following schematic:
442 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
444 DEPENDENCIES: SDCARD requires the use of SSP0.
445 -----------------------------------------------------------------------*/
446 #ifdef CFG_BRD_LPC1343_REFDESIGN
447 // #define CFG_SDCARD
448 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
449 #define CFG_SDCARD_CDPORT (3)
450 #define CFG_SDCARD_CDPIN (0)
453 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
454 // #define CFG_SDCARD
455 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
456 #define CFG_SDCARD_CDPORT (3)
457 #define CFG_SDCARD_CDPIN (0)
460 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
462 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
463 #define CFG_SDCARD_CDPORT (3)
464 #define CFG_SDCARD_CDPIN (0)
467 #ifdef CFG_BRD_LPC1343_802154USBSTICK
468 // #define CFG_SDCARD
469 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
470 #define CFG_SDCARD_CDPORT (3)
471 #define CFG_SDCARD_CDPIN (0)
474 #ifdef CFG_BRD_LPC1343_OLIMEX_P
475 // #define CFG_SDCARD
476 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
477 #define CFG_SDCARD_CDPORT (3)
478 #define CFG_SDCARD_CDPIN (0)
480 /*=========================================================================*/
483 /*=========================================================================
485 -----------------------------------------------------------------------
487 CFG_USBHID If this field is defined USB HID support will
488 be included. Currently uses ROM-based USB HID
489 CFG_USBCDC If this field is defined USB CDC support will
490 be included, with the USB Serial Port speed
491 set to 115200 BPS by default
492 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
493 when initialising USBCDC, and should be a
494 standard value like 57600, 9600, etc.
495 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
496 USB to connect. Must be a multiple of 10!
497 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
498 printf data until it can be sent out in
499 64 byte frames. The buffer is required since
500 only one frame per ms can be sent using USB
501 CDC (see 'puts' in systeminit.c).
503 -----------------------------------------------------------------------*/
504 #define CFG_USB_VID (0x239A)
505 #define CFG_USB_PID (0x1002)
507 #ifdef CFG_BRD_LPC1343_REFDESIGN
508 // #define CFG_USBHID
510 #define CFG_USBCDC_BAUDRATE (115200)
511 #define CFG_USBCDC_INITTIMEOUT (5000)
512 #define CFG_USBCDC_BUFFERSIZE (256)
515 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
516 // #define CFG_USBHID
517 // #define CFG_USBCDC
518 #define CFG_USBCDC_BAUDRATE (115200)
519 #define CFG_USBCDC_INITTIMEOUT (5000)
520 #define CFG_USBCDC_BUFFERSIZE (256)
523 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
524 // #define CFG_USBHID
526 #define CFG_USBCDC_BAUDRATE (115200)
527 #define CFG_USBCDC_INITTIMEOUT (5000)
528 #define CFG_USBCDC_BUFFERSIZE (256)
531 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
532 // #define CFG_USBHID
533 // #define CFG_USBCDC
534 #define CFG_USBCDC_BAUDRATE (57600)
535 #define CFG_USBCDC_INITTIMEOUT (5000)
536 #define CFG_USBCDC_BUFFERSIZE (256)
539 #ifdef CFG_BRD_LPC1343_802154USBSTICK
540 // #define CFG_USBHID
542 #define CFG_USBCDC_BAUDRATE (115200)
543 #define CFG_USBCDC_INITTIMEOUT (5000)
544 #define CFG_USBCDC_BUFFERSIZE (256)
547 #ifdef CFG_BRD_LPC1343_OLIMEX_P
548 // #define CFG_USBHID
550 #define CFG_USBCDC_BAUDRATE (115200)
551 #define CFG_USBCDC_INITTIMEOUT (5000)
552 #define CFG_USBCDC_BUFFERSIZE (256)
554 /*=========================================================================*/
557 /*=========================================================================
559 -----------------------------------------------------------------------
561 CFG_PRINTF_UART Will cause all printf statements to be
563 CFG_PRINTF_USBCDC Will cause all printf statements to be
564 redirect to USB Serial
565 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
568 Note: If no printf redirection definitions are present, all printf
569 output will be ignored.
570 -----------------------------------------------------------------------*/
571 #ifdef CFG_BRD_LPC1343_REFDESIGN
572 // #define CFG_PRINTF_UART
573 #define CFG_PRINTF_USBCDC
574 #define CFG_PRINTF_NEWLINE "\r\n"
577 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
578 #define CFG_PRINTF_UART
579 // #define CFG_PRINTF_USBCDC
580 #define CFG_PRINTF_NEWLINE "\r\n"
583 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
584 // #define CFG_PRINTF_UART
585 #define CFG_PRINTF_USBCDC
586 #define CFG_PRINTF_NEWLINE "\r\n"
589 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
590 #define CFG_PRINTF_UART
591 // #define CFG_PRINTF_USBCDC
592 #define CFG_PRINTF_NEWLINE "\n"
595 #ifdef CFG_BRD_LPC1343_802154USBSTICK
596 // #define CFG_PRINTF_UART
597 #define CFG_PRINTF_USBCDC
598 #define CFG_PRINTF_NEWLINE "\r\n"
601 #ifdef CFG_BRD_LPC1343_OLIMEX_P
602 // #define CFG_PRINTF_UART
603 #define CFG_PRINTF_USBCDC
604 #define CFG_PRINTF_NEWLINE "\r\n"
606 /*=========================================================================*/
609 /*=========================================================================
610 COMMAND LINE INTERFACE
611 -----------------------------------------------------------------------
613 CFG_INTERFACE If this field is defined the UART or USBCDC
614 based command-line interface will be included
615 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
617 CFG_INTERFACE_PROMPT The command prompt to display at the start
618 of every new data entry line
619 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
620 response to commands will be send to the
621 output buffer. The command prompt will not
622 be displayed and incoming text will not be
623 echoed back to the output buffer (allowing
624 you to see the text you have input). This
625 is normally only desirable in a situation
626 where another MCU is communicating with
628 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
629 characters will be dropped
630 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
631 set high when a command starts executing
632 and will go low when the command has
633 finished executing or the LCD is not busy.
634 This allows another device to know when a
635 new command can safely be sent.
636 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
637 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
638 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
639 error messages will be returned (followed
640 by CFG_PRINTF_NEWLINE), rather than more
641 verbose error messages. The specific
642 characters used are defined below.
643 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
644 will be sent when the command prompt is
645 ready for a new command. This is in
646 addition to CFG_INTERFACE_ENABLEIRQ if
647 this is also enabled. The character used
650 NOTE: The command-line interface will use either
651 USB-CDC or UART depending on whether
652 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
654 -----------------------------------------------------------------------*/
655 #ifdef CFG_BRD_LPC1343_REFDESIGN
656 #define CFG_INTERFACE
657 #define CFG_INTERFACE_MAXMSGSIZE (256)
658 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
659 #define CFG_INTERFACE_SILENTMODE (0)
660 #define CFG_INTERFACE_DROPCR (0)
661 #define CFG_INTERFACE_ENABLEIRQ (0)
662 #define CFG_INTERFACE_IRQPORT (0)
663 #define CFG_INTERFACE_IRQPIN (7)
664 #define CFG_INTERFACE_SHORTERRORS (0)
665 #define CFG_INTERFACE_CONFIRMREADY (0)
668 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
669 // #define CFG_INTERFACE
670 #define CFG_INTERFACE_MAXMSGSIZE (256)
671 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
672 #define CFG_INTERFACE_SILENTMODE (0)
673 #define CFG_INTERFACE_DROPCR (0)
674 #define CFG_INTERFACE_ENABLEIRQ (0)
675 #define CFG_INTERFACE_IRQPORT (0)
676 #define CFG_INTERFACE_IRQPIN (7)
677 #define CFG_INTERFACE_SHORTERRORS (0)
678 #define CFG_INTERFACE_CONFIRMREADY (0)
681 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
682 #define CFG_INTERFACE
683 #define CFG_INTERFACE_MAXMSGSIZE (256)
684 #define CFG_INTERFACE_PROMPT "CMD >> "
685 #define CFG_INTERFACE_SILENTMODE (0)
686 #define CFG_INTERFACE_DROPCR (0)
687 #define CFG_INTERFACE_ENABLEIRQ (0)
688 #define CFG_INTERFACE_IRQPORT (0)
689 #define CFG_INTERFACE_IRQPIN (7)
690 #define CFG_INTERFACE_SHORTERRORS (0)
691 #define CFG_INTERFACE_CONFIRMREADY (0)
692 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
693 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
694 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
695 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
698 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
699 #define CFG_INTERFACE
700 #define CFG_INTERFACE_MAXMSGSIZE (256)
701 #define CFG_INTERFACE_PROMPT ">>"
702 #define CFG_INTERFACE_SILENTMODE (1)
703 #define CFG_INTERFACE_DROPCR (1)
704 #define CFG_INTERFACE_ENABLEIRQ (1)
705 #define CFG_INTERFACE_IRQPORT (0)
706 #define CFG_INTERFACE_IRQPIN (7)
707 #define CFG_INTERFACE_SHORTERRORS (1)
708 #define CFG_INTERFACE_CONFIRMREADY (0)
709 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
710 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
711 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
712 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
715 #ifdef CFG_BRD_LPC1343_802154USBSTICK
716 // #define CFG_INTERFACE
717 #define CFG_INTERFACE_MAXMSGSIZE (256)
718 #define CFG_INTERFACE_PROMPT "CMD >> "
719 #define CFG_INTERFACE_SILENTMODE (0)
720 #define CFG_INTERFACE_DROPCR (0)
721 #define CFG_INTERFACE_ENABLEIRQ (0)
722 #define CFG_INTERFACE_IRQPORT (0)
723 #define CFG_INTERFACE_IRQPIN (7)
724 #define CFG_INTERFACE_SHORTERRORS (0)
725 #define CFG_INTERFACE_CONFIRMREADY (0)
728 #ifdef CFG_BRD_LPC1343_OLIMEX_P
729 #define CFG_INTERFACE
730 #define CFG_INTERFACE_MAXMSGSIZE (256)
731 #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
732 #define CFG_INTERFACE_SILENTMODE (0)
733 #define CFG_INTERFACE_DROPCR (0)
734 #define CFG_INTERFACE_ENABLEIRQ (0)
735 #define CFG_INTERFACE_IRQPORT (0)
736 #define CFG_INTERFACE_IRQPIN (7)
737 #define CFG_INTERFACE_SHORTERRORS (0)
738 #define CFG_INTERFACE_CONFIRMREADY (0)
740 /*=========================================================================*/
743 /*=========================================================================
745 -----------------------------------------------------------------------
747 CFG_PWM If this is defined, a basic PWM driver
748 will be included using 16-bit Timer 1 and
749 Pin 1.9 (MAT0) for the PWM output. In
750 order to allow for a fixed number of
751 pulses to be generated, some PWM-specific
752 code is required in the 16-Bit Timer 1
753 ISR. See "core/timer16/timer16.c" for
755 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
756 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
758 DEPENDENCIES: PWM output requires the use of 16-bit
759 timer 1 and pin 1.9 (CT16B1_MAT0).
760 -----------------------------------------------------------------------*/
762 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
763 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
764 /*=========================================================================*/
767 /*=========================================================================
768 STEPPER MOTOR SETTINGS
769 -----------------------------------------------------------------------
771 CFG_STEPPER If this is defined, a simple bi-polar
772 stepper motor will be included for common
773 H-bridge chips like the L293D or SN754410N
775 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
777 -----------------------------------------------------------------------*/
778 // #define CFG_STEPPER
779 /*=========================================================================*/
782 /*=========================================================================
784 -----------------------------------------------------------------------
786 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
787 will be included during build
788 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
790 -----------------------------------------------------------------------*/
791 #ifdef CFG_BRD_LPC1343_REFDESIGN
792 #define CFG_I2CEEPROM
793 #define CFG_I2CEEPROM_SIZE (3072)
796 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
797 // #define CFG_I2CEEPROM
798 #define CFG_I2CEEPROM_SIZE (3072)
801 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
802 #define CFG_I2CEEPROM
803 #define CFG_I2CEEPROM_SIZE (3072)
806 #ifdef CFG_BRD_LPC1343_802154USBSTICK
807 #define CFG_I2CEEPROM
808 #define CFG_I2CEEPROM_SIZE (3072)
811 #ifdef CFG_BRD_LPC1343_OLIMEX_P
812 // #define CFG_I2CEEPROM
813 #define CFG_I2CEEPROM_SIZE (3072)
815 /*=========================================================================*/
818 /*=========================================================================
820 -----------------------------------------------------------------------
821 EEPROM is used to persist certain user modifiable values to make
822 sure that these changes remain in effect after a reset or hard
823 power-down. The addresses in EEPROM for these various system
824 settings/values are defined below. The first 256 bytes of EEPROM
825 are reserved for this (0x0000..0x00FF).
827 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
829 EEPROM Address (0x0000..0x00FF)
830 ===============================
831 0 1 2 3 4 5 6 7 8 9 A B C D E F
832 000x x x x x x x x x . x x . . . . . Chibi
833 001x . . . . . . . . . . . . . . . .
834 002x x x x x . . . . . . . . . . . . UART
835 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
836 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
837 005x . . . . . . . . . . . . . . . .
838 006x . . . . . . . . . . . . . . . .
839 007x . . . . . . . . . . . . . . . .
840 008x . . . . . . . . . . . . . . . .
841 009x . . . . . . . . . . . . . . . .
842 00Ax . . . . . . . . . . . . . . . .
843 00Bx . . . . . . . . . . . . . . . .
844 00Cx . . . . . . . . . . . . . . . .
845 00Dx . . . . . . . . . . . . . . . .
846 00Ex . . . . . . . . . . . . . . . .
847 00Fx . . . . . . . . . . . . . . . .
849 -----------------------------------------------------------------------*/
850 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
851 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
852 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
853 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
854 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
855 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
856 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
857 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
858 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
859 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
860 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
861 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
862 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
863 /*=========================================================================*/
866 /*=========================================================================
867 LM75B TEMPERATURE SENSOR
868 -----------------------------------------------------------------------
870 CFG_LM75B If defined, drivers for an optional LM75B
871 temperature sensor will be included during
872 build (requires external HW)
874 -----------------------------------------------------------------------*/
876 /*=========================================================================*/
879 /*=========================================================================
881 -----------------------------------------------------------------------
883 CFG_CHIBI If defined, the CHIBI wireless stack will be
884 included during build. Requires external HW.
885 CFG_CHIBI_MODE The mode to use when receiving and transmitting
886 wireless data. See chb_drvr.h for possible values
887 CFG_CHIBI_POWER The power level to use when transmitting. See
888 chb_drvr.h for possible values
889 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
890 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
891 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
892 0 to disable it. If promiscuous mode is
893 enabled be sure to set CFG_CHIBI_BUFFERSIZE
894 to an appropriately large value (ex. 1024)
895 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
897 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
898 0 and pins 3.1, 3.2, 3.3. It also requires
899 the presence of CFG_I2CEEPROM.
901 NOTE: These settings are not relevant to all boards!
902 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
903 show how 'CHIBI' is meant to be connected
904 -----------------------------------------------------------------------*/
905 #ifdef CFG_BRD_LPC1343_REFDESIGN
907 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
908 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
909 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
910 #define CFG_CHIBI_PANID (0x1234)
911 #define CFG_CHIBI_PROMISCUOUS (0)
912 #define CFG_CHIBI_BUFFERSIZE (128)
915 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
917 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
918 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
919 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
920 #define CFG_CHIBI_PANID (0x1234)
921 #define CFG_CHIBI_PROMISCUOUS (0)
922 #define CFG_CHIBI_BUFFERSIZE (128)
925 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
927 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
928 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
929 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
930 #define CFG_CHIBI_PANID (0x1234)
931 #define CFG_CHIBI_PROMISCUOUS (0)
932 #define CFG_CHIBI_BUFFERSIZE (128)
935 #ifdef CFG_BRD_LPC1343_802154USBSTICK
937 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
938 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
939 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
940 #define CFG_CHIBI_PANID (0x1234)
941 #define CFG_CHIBI_PROMISCUOUS (0)
942 #define CFG_CHIBI_BUFFERSIZE (1024)
945 #ifdef CFG_BRD_LPC1343_OLIMEX_P
947 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
948 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
949 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
950 #define CFG_CHIBI_PANID (0x1234)
951 #define CFG_CHIBI_PROMISCUOUS (0)
952 #define CFG_CHIBI_BUFFERSIZE (128)
954 /*=========================================================================*/
957 /*=========================================================================
959 -----------------------------------------------------------------------
961 CFG_TFTLCD If defined, this will cause drivers for
962 a pre-determined LCD screen to be included
963 during build. Only one LCD driver can be
964 included during the build process (for ex.
965 'drivers/lcd/hw/ILI9325.c')
966 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
967 included for 3x6, 5x8, 7x8 and 8x8 fonts.
968 This should only be enabled if these small
969 fonts are required since there is already
970 support for larger fonts generated with
972 http://www.pavius.net/downloads/tools/53-the-dot-factory
973 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
974 touch event with the touch screen (and exit
975 from 'tsWaitForEvent' in touchscreen.c).
976 Should be an 8-bit value somewhere between
977 8 and 75 in normal circumstances. This is
978 the default value and may be overriden by
979 a value stored in EEPROM.
980 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
981 presses in dialogue boxes
983 PIN LAYOUT: The pin layout that is used by this driver
984 can be seen in the following schematic:
985 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
987 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
988 1.10, 1.11, 3.3 and 2.1-9.
989 -----------------------------------------------------------------------*/
990 #ifdef CFG_BRD_LPC1343_REFDESIGN
991 // #define CFG_TFTLCD
992 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
993 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
994 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
997 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
998 // #define CFG_TFTLCD
999 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1000 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1001 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1004 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1006 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1007 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1008 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1011 #ifdef CFG_BRD_LPC1343_802154USBSTICK
1012 // #define CFG_TFTLCD
1013 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1014 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1015 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1018 #ifdef CFG_BRD_LPC1343_OLIMEX_P
1019 // #define CFG_TFTLCD
1020 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1021 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1022 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1024 /*=========================================================================*/
1027 /*=========================================================================
1028 Monochrome/Bitmap Graphic LCDs
1029 -----------------------------------------------------------------------
1031 CFG_ST7565 If defined, this will cause drivers for
1032 the 128x64 pixel ST7565 LCD to be included
1033 CFG_SSD1306 If defined, this will cause drivers for
1034 the 128x64 pixel SSD1306 OLED display to be
1036 CFG_SHARPMEM If defined, this will cause drivers for
1037 Sharp Memory Displays to be included
1039 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
1040 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
1041 DEPENDENCIES: SHARPMEM requires the use of pins 2.1-4.
1042 -----------------------------------------------------------------------*/
1043 // #define CFG_ST7565
1044 // #define CFG_SSD1306
1045 // #define CFG_SHARPMEM
1046 /*=========================================================================*/
1049 /*=========================================================================
1051 -----------------------------------------------------------------------
1053 CFG_RSA If defined, support for basic RSA
1054 encryption will be included.
1055 CFG_RSA_BITS Indicates the number of bits used for
1056 RSA encryption keys. To keep code size
1057 reasonable, RSA encryption is currently
1058 limited to using 64-bit or 32-bit numbers,
1059 with 64-bit providing higher security, and
1060 32-bit providing smaller encrypted text
1063 NOTE: Please note that Printf can not be
1064 used to display 64-bit values (%lld)!
1065 -----------------------------------------------------------------------*/
1067 #define CFG_RSA_BITS (32)
1068 /*=========================================================================*/
1073 /*=========================================================================
1074 CONFIG FILE VALIDATION
1075 -------------------------------------------------------------------------
1076 Basic error checking to make sure that incompatible defines are not
1077 enabled at the same time, etc.
1079 =========================================================================*/
1081 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1082 !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1083 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1084 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1085 !defined CFG_BRD_LPC1343_802154USBSTICK && \
1086 !defined CFG_BRD_LPC1343_OLIMEX_P
1087 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
1090 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1091 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1094 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1095 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1098 #if defined CFG_USBCDC && defined CFG_USBHID
1099 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1102 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1103 #error "Only one SCK pin can be defined at a time for SSP0"
1106 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1107 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1110 #ifdef CFG_INTERFACE
1111 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1112 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1114 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1115 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1120 #if !defined CFG_I2CEEPROM
1121 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1124 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1127 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1130 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1132 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1133 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1139 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1142 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1145 #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1148 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1150 #if !defined CFG_I2CEEPROM
1151 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1157 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1163 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1168 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1169 #error "CFG_RSA_BITS must be equal to either 32 or 64."
1173 #if ADC_AVERAGING_ENABLE && ADC_AVERAGING_SAMPLES < 1
1174 #error "ADC_AVERAGING_SAMPLES must be 1 or higher when ADC averaging is enabled"
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