projectconfig.h

   1 /**************************************************************************/
   2 /*!
   3     @file     projectconfig.h
   4     @author   K. Townsend (microBuilder.eu)
   5
   6     @section LICENSE
   7
   8     Software License Agreement (BSD License)
   9
  10     Copyright (c) 2010, microBuilder SARL
  11     All rights reserved.
  12
  13     Redistribution and use in source and binary forms, with or without
  14     modification, are permitted provided that the following conditions are met:
  15     1. Redistributions of source code must retain the above copyright
  16     notice, this list of conditions and the following disclaimer.
  17     2. Redistributions in binary form must reproduce the above copyright
  18     notice, this list of conditions and the following disclaimer in the
  19     documentation and/or other materials provided with the distribution.
  20     3. Neither the name of the copyright holders nor the
  21     names of its contributors may be used to endorse or promote products
  22     derived from this software without specific prior written permission.
  23
  24     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  25     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  26     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  28     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  29     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  31     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  32     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34 */
  35 /**************************************************************************/
  36
  37 #ifndef _PROJECTCONFIG_H_
  38 #define _PROJECTCONFIG_H_
  39
  40 #include "lpc134x.h"
  41 #include "sysdefs.h"
  42
  43 /*=========================================================================
  44     BOARD SELECTION
  45
  46     Because several boards use this code library with sometimes slightly
  47     different pin configuration, you will need to specify which board you
  48     are using by enabling one of the following definitions. The code base
  49     will then try to configure itself accordingly for that board.
  50     -----------------------------------------------------------------------*/
  51     #define CFG_BRD_LPC1343_REFDESIGN
  52     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
  53     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
  54     // #define CFG_BRD_LPC1343_802154USBSTICK
  55 /*=========================================================================*/
  56
  57
  58 /**************************************************************************
  59     PIN USAGE
  60     -----------------------------------------------------------------------
  61     This table tries to give an indication of which GPIO pins and
  62     peripherals are used by the available drivers and SW examples.  Only
  63     dedicated GPIO pins available on the LPC1343 Reference Board are shown
  64     below.  Any unused peripheral blocks like I2C, SSP, ADC, etc., can
  65     also be used as GPIO if they are available.
  66
  67                 PORT 1        PORT 2                PORT 3
  68                 =========     =================     =======
  69                 8 9 10 11     1 2 3 4 5 6 7 8 9     0 1 2 3
  70
  71     SDCARD      . .  .  .     . . . . . . . . .     X . . .
  72     PWM         . X  .  .     . . . . . . . . .     . . . .
  73     STEPPER     . .  .  .     . . . . . . . . .     X X X X
  74     CHIBI       X X  X  .     . . . . . . . . .     . . . .
  75     ILI9325/8   X X  X  X     X X X X X X X X X     . . . X
  76     ST7565      X X  X  X     X X X X X X X X X     . . . X
  77     ST7735      . .  .  .     X X X X X X . . .     . . . .
  78     SSD1306     . .  .  .     X X X . X X . . .     . . . .
  79     MCP121      . .  .  .     . . . . . . . . .     . X . .
  80
  81                 TIMERS                    SSP     ADC         UART
  82                 ======================    ===     =======     ====
  83                 16B0  16B1  32B0  32B1    0       0 1 2 3     0
  84
  85     SDCARD      .     .     .     .       X       . . . .     .
  86     PWM         .     X     .     .       .       . . . .     .
  87     PMU [1]     .     .     X     .       .       . . . .     .
  88     USB         .     .     .     X       .       . . . .     .
  89     STEPPER     .     .     X     .       .       . . . .     .
  90     CHIBI       x     .     .     .       X       . . . .     .
  91     ILI9325/8   .     .     .     .       .       X X X X     .
  92     ST7565      .     .     .     .       .       X X X X     .
  93     ST7535      .     .     .     .       .       . . . .     .
  94     SSD1306     .     .     .     .       .       . . . .     .
  95     INTERFACE   .     .     .     .       .       . . . .     X[2]
  96
  97     [1]  PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep.  This timer
  98          can safely be used by other peripherals, but may need to be
  99          reconfigured when you wakeup from deep-sleep.
 100     [2]  INTERFACE can be configured to use either USBCDC or UART
 101
 102  **************************************************************************/
 103
 104
 105 /**************************************************************************
 106     I2C Addresses
 107     -----------------------------------------------------------------------
 108     The following addresses are used by the different I2C sensors included
 109     in the code base [1]
 110
 111                                 HEX       BINARY
 112                                 ====      ========
 113     ISL12022M (RTC)             0xDE      1101111x
 114     ISL12022M (SRAM)            0xAE      1010111x
 115     LM75B                       0x90      1001000x
 116     MCP24AA                     0xA0      1010000x
 117     MCP4725                     0xC0      1100000x
 118     TSL2561                     0x72      0111001x
 119     TCS3414                     0x72      0111001x
 120
 121     [1]  Alternative addresses may exists, but the addresses listed in this
 122          table are the values used in the code base
 123
 124  **************************************************************************/
 125
 126
 127 /*=========================================================================
 128     FIRMWARE VERSION SETTINGS
 129     -----------------------------------------------------------------------*/
 130     #define CFG_FIRMWARE_VERSION_MAJOR            (0)
 131     #define CFG_FIRMWARE_VERSION_MINOR            (9)
 132     #define CFG_FIRMWARE_VERSION_REVISION         (5)
 133 /*=========================================================================*/
 134
 135
 136 /*=========================================================================
 137     CORE CPU SETTINGS
 138     -----------------------------------------------------------------------
 139
 140     CFG_CPU_CCLK    Value is for reference only.  'core/cpu/cpu.c' must
 141                     be modified to change the clock speed, but the value
 142                     should be indicated here since CFG_CPU_CCLK is used by
 143                     other peripherals to determine timing.
 144
 145     -----------------------------------------------------------------------*/
 146     #define CFG_CPU_CCLK                (72000000)  // 1 tick = 13.88nS
 147 /*=========================================================================*/
 148
 149
 150 /*=========================================================================
 151     SYSTICK TIMER
 152     -----------------------------------------------------------------------
 153
 154     CFG_SYSTICK_DELAY_IN_MS   The number of milliseconds between each tick
 155                               of the systick timer.
 156
 157     -----------------------------------------------------------------------*/
 158     #define CFG_SYSTICK_DELAY_IN_MS     (1)
 159 /*=========================================================================*/
 160
 161
 162 /*=========================================================================
 163     ALTERNATE RESET PIN
 164     -----------------------------------------------------------------------
 165
 166     CFG_ALTRESET        If defined, indicates that a GPIO pin should be
 167                         configured as an alternate reset pin in addition
 168                         to the dedicated reset pin.
 169     CFG_ALTRESET_PORT   The GPIO port where the alt reset pin is located
 170     CFG_ALTRESET_PIN    The GPIO pin where the alt reset pin is located
 171
 172     -----------------------------------------------------------------------*/
 173     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 174       #define CFG_ALTRESET
 175       #define CFG_ALTRESET_PORT         (1)
 176       #define CFG_ALTRESET_PIN          (5)   // P1.5 = RTS
 177     #endif
 178 /*=========================================================================*/
 179
 180
 181 /*=========================================================================
 182     UART
 183     -----------------------------------------------------------------------
 184
 185     CFG_UART_BAUDRATE         The default UART speed.  This value is used
 186                               when initialising UART, and should be a
 187                               standard value like 57600, 9600, etc.
 188                               NOTE: This value may be overridden if
 189                               another value is stored in EEPROM!
 190     CFG_UART_BUFSIZE          The length in bytes of the UART RX FIFO. This
 191                               will determine the maximum number of received
 192                               characters to store in memory.
 193
 194     -----------------------------------------------------------------------*/
 195     #ifdef CFG_BRD_LPC1343_REFDESIGN
 196       #define CFG_UART_BAUDRATE           (115200)
 197       #define CFG_UART_BUFSIZE            (512)
 198     #endif
 199
 200     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 201       #define CFG_UART_BAUDRATE           (115200)
 202       #define CFG_UART_BUFSIZE            (512)
 203     #endif
 204
 205     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 206       #define CFG_UART_BAUDRATE           (57600)
 207       #define CFG_UART_BUFSIZE            (512)
 208     #endif
 209
 210     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 211       #define CFG_UART_BAUDRATE           (115200)
 212       #define CFG_UART_BUFSIZE            (512)
 213     #endif
 214 /*=========================================================================*/
 215
 216
 217 /*=========================================================================
 218     SSP
 219     -----------------------------------------------------------------------
 220
 221     CFG_SSP0_SCKPIN_2_11      Indicates which pin should be used for SCK0
 222     CFG_SSP0_SCKPIN_0_6
 223
 224     -----------------------------------------------------------------------*/
 225     #ifdef CFG_BRD_LPC1343_REFDESIGN
 226       #define CFG_SSP0_SCKPIN_2_11
 227       // #define CFG_SSP0_SCKPIN_0_6
 228     #endif
 229
 230     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 231       #define CFG_SSP0_SCKPIN_2_11
 232       // #define CFG_SSP0_SCKPIN_0_6
 233     #endif
 234
 235     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 236       // #define CFG_SSP0_SCKPIN_2_11
 237       #define CFG_SSP0_SCKPIN_0_6
 238     #endif
 239 /*=========================================================================*/
 240
 241
 242 /*=========================================================================
 243     ON-BOARD LED
 244     -----------------------------------------------------------------------
 245
 246     CFG_LED_PORT              The port for the on board LED
 247     CFG_LED_PIN               The pin for the on board LED
 248     CFG_LED_ON                The pin state to turn the LED on (0 = low, 1 = high)
 249     CFG_LED_OFF               The pin state to turn the LED off (0 = low, 1 = high)
 250
 251     -----------------------------------------------------------------------*/
 252     #ifdef CFG_BRD_LPC1343_REFDESIGN
 253       #define CFG_LED_PORT                (2)
 254       #define CFG_LED_PIN                 (10)
 255       #define CFG_LED_ON                  (0)
 256       #define CFG_LED_OFF                 (1)
 257     #endif
 258
 259     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 260       #define CFG_LED_PORT                (2)
 261       #define CFG_LED_PIN                 (10)
 262       #define CFG_LED_ON                  (0)
 263       #define CFG_LED_OFF                 (1)
 264     #endif
 265
 266     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 267       #define CFG_LED_PORT                (3)
 268       #define CFG_LED_PIN                 (2)
 269       #define CFG_LED_ON                  (0)
 270       #define CFG_LED_OFF                 (1)
 271     #endif
 272 /*=========================================================================*/
 273
 274
 275 /*=========================================================================
 276     MICRO-SD CARD
 277     -----------------------------------------------------------------------
 278
 279     CFG_SDCARD                If this field is defined SD Card and FAT32
 280                               file system support will be included
 281     CFG_SDCARD_READONLY       If this is set to 1, all commands to
 282                               write to the SD card will be removed
 283                               saving some flash space.
 284     CFG_SDCARD_CDPORT         The card detect port number
 285     CFG_SDCARD_CDPIN          The card detect pin number
 286
 287     NOTE:                     All config settings for FAT32 are defined
 288                               in ffconf.h
 289
 290     BENCHMARK:                With SPI set to 6.0MHz, FATFS can read
 291                               ~300KB/s (w/512 byte read buffer)
 292
 293     PIN LAYOUT:               The pin layout that is used by this driver
 294                               can be seen in the following schematic:
 295                               /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 296
 297     DEPENDENCIES:             SDCARD requires the use of SSP0.
 298     -----------------------------------------------------------------------*/
 299     #ifdef CFG_BRD_LPC1343_REFDESIGN
 300       // #define CFG_SDCARD
 301       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 302       #define CFG_SDCARD_CDPORT           (3)
 303       #define CFG_SDCARD_CDPIN            (0)
 304     #endif
 305
 306     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 307       #define CFG_SDCARD
 308       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 309       #define CFG_SDCARD_CDPORT           (3)
 310       #define CFG_SDCARD_CDPIN            (0)
 311     #endif
 312
 313     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 314       // #define CFG_SDCARD
 315       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 316       #define CFG_SDCARD_CDPORT           (3)
 317       #define CFG_SDCARD_CDPIN            (0)
 318     #endif
 319 /*=========================================================================*/
 320
 321
 322 /*=========================================================================
 323     USB
 324     -----------------------------------------------------------------------
 325
 326     CFG_USBHID                If this field is defined USB HID support will
 327                               be included.  Currently uses ROM-based USB HID
 328     CFG_USBCDC                If this field is defined USB CDC support will
 329                               be included, with the USB Serial Port speed
 330                               set to 115200 BPS by default
 331     CFG_USBCDC_BAUDRATE       The default TX/RX speed.  This value is used
 332                               when initialising USBCDC, and should be a
 333                               standard value like 57600, 9600, etc.
 334     CFG_USBCDC_INITTIMEOUT    The maximum delay in milliseconds to wait for
 335                               USB to connect.  Must be a multiple of 10!
 336     CFG_USBCDC_BUFFERSIZE     Size of the buffer (in bytes) that stores
 337                               printf data until it can be sent out in
 338                               64 byte frames.  The buffer is required since
 339                               only one frame per ms can be sent using USB
 340                               CDC (see 'puts' in systeminit.c).
 341
 342     -----------------------------------------------------------------------*/
 343     #define CFG_USB_VID                   (0x239A)
 344     #define CFG_USB_PID                   (0x1002)
 345
 346     #ifdef CFG_BRD_LPC1343_REFDESIGN
 347       // #define CFG_USBHID
 348       #define CFG_USBCDC
 349       #define CFG_USBCDC_BAUDRATE         (115200)
 350       #define CFG_USBCDC_INITTIMEOUT      (5000)
 351       #define CFG_USBCDC_BUFFERSIZE       (256)
 352     #endif
 353
 354     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 355       // #define CFG_USBHID
 356       #define CFG_USBCDC
 357       #define CFG_USBCDC_BAUDRATE         (115200)
 358       #define CFG_USBCDC_INITTIMEOUT      (5000)
 359       #define CFG_USBCDC_BUFFERSIZE       (256)
 360     #endif
 361
 362     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 363       // #define CFG_USBHID
 364       // #define CFG_USBCDC
 365       #define CFG_USBCDC_BAUDRATE         (57600)
 366       #define CFG_USBCDC_INITTIMEOUT      (5000)
 367       #define CFG_USBCDC_BUFFERSIZE       (256)
 368     #endif
 369
 370     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 371       // #define CFG_USBHID
 372       #define CFG_USBCDC
 373       #define CFG_USBCDC_BAUDRATE         (115200)
 374       #define CFG_USBCDC_INITTIMEOUT      (5000)
 375       #define CFG_USBCDC_BUFFERSIZE       (256)
 376     #endif
 377 /*=========================================================================*/
 378
 379
 380 /*=========================================================================
 381     PRINTF REDIRECTION
 382     -----------------------------------------------------------------------
 383
 384     CFG_PRINTF_UART           Will cause all printf statements to be
 385                               redirected to UART
 386     CFG_PRINTF_USBCDC         Will cause all printf statements to be
 387                               redirect to USB Serial
 388     CFG_PRINTF_NEWLINE        This is typically "\r\n" for Windows or
 389                               "\n" for *nix
 390
 391     Note: If no printf redirection definitions are present, all printf
 392     output will be ignored, though this will also save ~350 bytes flash.
 393
 394     NOTE: PRINTF Support =    ~350 bytes Flash (-Os)
 395     -----------------------------------------------------------------------*/
 396     #ifdef CFG_BRD_LPC1343_REFDESIGN
 397       // #define CFG_PRINTF_UART
 398       #define CFG_PRINTF_USBCDC
 399       #define CFG_PRINTF_NEWLINE          "\r\n"
 400     #endif
 401
 402     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 403       // #define CFG_PRINTF_UART
 404       #define CFG_PRINTF_USBCDC
 405       #define CFG_PRINTF_NEWLINE          "\r\n"
 406     #endif
 407
 408     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 409       #define CFG_PRINTF_UART
 410       // #define CFG_PRINTF_USBCDC
 411       #define CFG_PRINTF_NEWLINE          "\n"
 412     #endif
 413
 414     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 415       // #define CFG_PRINTF_UART
 416       #define CFG_PRINTF_USBCDC
 417       #define CFG_PRINTF_NEWLINE          "\r\n"
 418     #endif
 419 /*=========================================================================*/
 420
 421
 422 /*=========================================================================
 423     COMMAND LINE INTERFACE
 424     -----------------------------------------------------------------------
 425
 426     CFG_INTERFACE             If this field is defined the UART or USBCDC
 427                               based command-line interface will be included
 428     CFG_INTERFACE_MAXMSGSIZE  The maximum number of bytes to accept for an
 429                               incoming command
 430     CFG_INTERFACE_PROMPT      The command prompt to display at the start
 431                               of every new data entry line
 432     CFG_INTERFACE_SILENTMODE  If this is set to 1 only text generated in
 433                               response to commands will be send to the
 434                               output buffer.  The command prompt will not
 435                               be displayed and incoming text will not be
 436                               echoed back to the output buffer (allowing
 437                               you to see the text you have input).  This
 438                               is normally only desirable in a situation
 439                               where another MCU is communicating with
 440                               the LPC1343.
 441     CFG_INTERFACE_DROPCR      If this is set to 1 all incoming \r
 442                               characters will be dropped
 443     CFG_INTERFACE_ENABLEIRQ   If this is set to 1 the IRQ pin will be
 444                               set high when a command starts executing
 445                               and will go low when the command has
 446                               finished executing or the LCD is not busy.
 447                               This allows another device to know when a
 448                               new command can safely be sent.
 449     CFG_INTERFACE_IRQPORT     The gpio port for the IRQ/busy pin
 450     CFG_INTERFACE_IRQPIN      The gpio pin number for the IRQ/busy pin
 451     CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
 452                               error messages will be returned (followed
 453                               by CFG_PRINTF_NEWLINE), rather than more
 454                               verbose error messages.  The specific
 455                               characters used are defined below.
 456     CFG_INTERFACE_CONFIRMREADY  If this is set to 1 a text confirmation
 457                               will be sent when the command prompt is
 458                               ready for a new command.  This is in
 459                               addition to CFG_INTERFACE_ENABLEIRQ if
 460                               this is also enabled.  The character used
 461                               is defined below.
 462
 463     NOTE:                     The command-line interface will use either
 464                               USB-CDC or UART depending on whether
 465                               CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
 466                               selected.
 467     -----------------------------------------------------------------------*/
 468     #ifdef CFG_BRD_LPC1343_REFDESIGN
 469       #define CFG_INTERFACE
 470       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 471       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 472       #define CFG_INTERFACE_SILENTMODE    (0)
 473       #define CFG_INTERFACE_DROPCR        (0)
 474       #define CFG_INTERFACE_ENABLEIRQ     (0)
 475       #define CFG_INTERFACE_IRQPORT       (0)
 476       #define CFG_INTERFACE_IRQPIN        (7)
 477       #define CFG_INTERFACE_SHORTERRORS   (0)
 478       #define CFG_INTERFACE_CONFIRMREADY  (0)
 479     #endif
 480
 481     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 482       #define CFG_INTERFACE
 483       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 484       #define CFG_INTERFACE_PROMPT        "CMD >> "
 485       #define CFG_INTERFACE_SILENTMODE    (0)
 486       #define CFG_INTERFACE_DROPCR        (0)
 487       #define CFG_INTERFACE_ENABLEIRQ     (0)
 488       #define CFG_INTERFACE_IRQPORT       (0)
 489       #define CFG_INTERFACE_IRQPIN        (7)
 490       #define CFG_INTERFACE_SHORTERRORS   (0)
 491       #define CFG_INTERFACE_CONFIRMREADY  (0)
 492       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 493       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 494       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 495       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 496     #endif
 497
 498     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 499       #define CFG_INTERFACE
 500       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 501       #define CFG_INTERFACE_PROMPT        ">>"
 502       #define CFG_INTERFACE_SILENTMODE    (1)
 503       #define CFG_INTERFACE_DROPCR        (1)
 504       #define CFG_INTERFACE_ENABLEIRQ     (1)
 505       #define CFG_INTERFACE_IRQPORT       (0)
 506       #define CFG_INTERFACE_IRQPIN        (7)
 507       #define CFG_INTERFACE_SHORTERRORS   (1)
 508       #define CFG_INTERFACE_CONFIRMREADY  (0)
 509       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 510       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 511       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 512       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 513     #endif
 514
 515     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 516       // #define CFG_INTERFACE
 517       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 518       #define CFG_INTERFACE_PROMPT        "CMD >> "
 519       #define CFG_INTERFACE_SILENTMODE    (0)
 520       #define CFG_INTERFACE_DROPCR        (0)
 521       #define CFG_INTERFACE_ENABLEIRQ     (0)
 522       #define CFG_INTERFACE_IRQPORT       (0)
 523       #define CFG_INTERFACE_IRQPIN        (7)
 524       #define CFG_INTERFACE_SHORTERRORS   (0)
 525       #define CFG_INTERFACE_CONFIRMREADY  (0)
 526     #endif
 527 /*=========================================================================*/
 528
 529
 530 /*=========================================================================
 531     PWM SETTINGS
 532     -----------------------------------------------------------------------
 533
 534     CFG_PWM                     If this is defined, a basic PWM driver
 535                                 will be included using 16-bit Timer 1 and
 536                                 Pin 1.9 (MAT0) for the PWM output.  In
 537                                 order to allow for a fixed number of
 538                                 pulses to be generated, some PWM-specific
 539                                 code is required in the 16-Bit Timer 1
 540                                 ISR.  See "core/timer16/timer16.c" for
 541                                 more information.
 542     CFG_PWM_DEFAULT_PULSEWIDTH  The default pulse width in ticks
 543     CFG_PWM_DEFAULT_DUTYCYCLE   The default duty cycle in percent
 544
 545     DEPENDENCIES:               PWM output requires the use of 16-bit
 546                                 timer 1 and pin 1.9 (CT16B1_MAT0).
 547     -----------------------------------------------------------------------*/
 548     // #define CFG_PWM
 549     #define CFG_PWM_DEFAULT_PULSEWIDTH  (CFG_CPU_CCLK / 1000)
 550     #define CFG_PWM_DEFAULT_DUTYCYCLE   (50)
 551 /*=========================================================================*/
 552
 553
 554 /*=========================================================================
 555     STEPPER MOTOR SETTINGS
 556     -----------------------------------------------------------------------
 557
 558     CFG_STEPPER                 If this is defined, a simple bi-polar
 559                                 stepper motor will be included for common
 560                                 H-bridge chips like the L293D or SN754410N
 561
 562     DEPENDENCIES:               STEPPER requires the use of pins 3.0-3 and
 563                                 32-bit Timer 0.
 564     -----------------------------------------------------------------------*/
 565     // #define CFG_STEPPER
 566 /*=========================================================================*/
 567
 568
 569 /*=========================================================================
 570     EEPROM
 571     -----------------------------------------------------------------------
 572
 573     CFG_I2CEEPROM             If defined, drivers for the onboard EEPROM
 574                               will be included during build
 575     CFG_I2CEEPROM_SIZE        The number of bytes available on the EEPROM
 576
 577     -----------------------------------------------------------------------*/
 578     #ifdef CFG_BRD_LPC1343_REFDESIGN
 579       #define CFG_I2CEEPROM
 580       #define CFG_I2CEEPROM_SIZE          (3072)
 581     #endif
 582
 583     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 584       #define CFG_I2CEEPROM
 585       #define CFG_I2CEEPROM_SIZE          (3072)
 586     #endif
 587
 588     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 589       #define CFG_I2CEEPROM
 590       #define CFG_I2CEEPROM_SIZE          (3072)
 591     #endif
 592 /*=========================================================================*/
 593
 594
 595 /*=========================================================================
 596     EEPROM MEMORY MAP
 597     -----------------------------------------------------------------------
 598     EEPROM is used to persist certain user modifiable values to make
 599     sure that these changes remain in effect after a reset or hard
 600     power-down.  The addresses in EEPROM for these various system
 601     settings/values are defined below.  The first 256 bytes of EEPROM
 602     are reserved for this (0x0000..0x00FF).
 603
 604     CFG_EEPROM_RESERVED       The last byte of reserved EEPROM memory
 605
 606           EEPROM Address (0x0000..0x00FF)
 607           ===============================
 608           0 1 2 3 4 5 6 7 8 9 A B C D E F
 609     000x  x x x x x x x x . x x . . . . .   Chibi
 610     001x  . . . . . . . . . . . . . . . .
 611     002x  x x x x . . . . . . . . . . . .   UART
 612     003x  x x x x x x x x x x x x x x x x   Touch Screen Calibration
 613     004x  x x x x x x x x x x x x x x . .   Touch Screen Calibration
 614     005x  . . . . . . . . . . . . . . . .
 615     006x  . . . . . . . . . . . . . . . .
 616     007x  . . . . . . . . . . . . . . . .
 617     008x  . . . . . . . . . . . . . . . .
 618     009x  . . . . . . . . . . . . . . . .
 619     00Ax  . . . . . . . . . . . . . . . .
 620     00Bx  . . . . . . . . . . . . . . . .
 621     00Cx  . . . . . . . . . . . . . . . .
 622     00Dx  . . . . . . . . . . . . . . . .
 623     00Ex  . . . . . . . . . . . . . . . .
 624     00Fx  . . . . . . . . . . . . . . . .
 625
 626     -----------------------------------------------------------------------*/
 627     #define CFG_EEPROM_RESERVED                 (0x00FF)              // Protect first 256 bytes of memory
 628     #define CFG_EEPROM_CHIBI_IEEEADDR           (uint16_t)(0x0000)    // 8
 629     #define CFG_EEPROM_CHIBI_SHORTADDR          (uint16_t)(0x0009)    // 2
 630     #define CFG_EEPROM_UART_SPEED               (uint16_t)(0x0020)    // 4
 631     #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED   (uint16_t)(0x0030)    // 1
 632     #define CFG_EEPROM_TOUCHSCREEN_CAL_AN       (uint16_t)(0x0031)    // 4
 633     #define CFG_EEPROM_TOUCHSCREEN_CAL_BN       (uint16_t)(0x0035)    // 4
 634     #define CFG_EEPROM_TOUCHSCREEN_CAL_CN       (uint16_t)(0x0039)    // 4
 635     #define CFG_EEPROM_TOUCHSCREEN_CAL_DN       (uint16_t)(0x003D)    // 4
 636     #define CFG_EEPROM_TOUCHSCREEN_CAL_EN       (uint16_t)(0x0041)    // 4
 637     #define CFG_EEPROM_TOUCHSCREEN_CAL_FN       (uint16_t)(0x0045)    // 4
 638     #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER  (uint16_t)(0x0049)    // 4
 639     #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD   (uint16_t)(0x004D)    // 1
 640 /*=========================================================================*/
 641
 642
 643 /*=========================================================================
 644     LM75B TEMPERATURE SENSOR
 645     -----------------------------------------------------------------------
 646
 647     CFG_LM75B                 If defined, drivers for an optional LM75B
 648                               temperature sensor will be included during
 649                               build (requires external HW)
 650
 651     -----------------------------------------------------------------------*/
 652     // #define CFG_LM75B
 653 /*=========================================================================*/
 654
 655
 656 /*=========================================================================
 657     CHIBI WIRELESS STACK
 658     -----------------------------------------------------------------------
 659
 660     CFG_CHIBI                   If defined, the CHIBI wireless stack will be
 661                                 included during build.  Requires external HW.
 662     CFG_CHIBI_MODE              The mode to use when receiving and transmitting
 663                                 wireless data.  See chb_drvr.h for possible values
 664     CFG_CHIBI_POWER             The power level to use when transmitting.  See
 665                                 chb_drvr.h for possible values
 666     CFG_CHIBI_CHANNEL           802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
 667     CFG_CHIBI_PANID             16-bit PAN Identifier (ex.0x1234)
 668     CFG_CHIBI_PROMISCUOUS       Set to 1 to enabled promiscuous mode or
 669                                 0 to disable it.  If promiscuous mode is
 670                                 enabled be sure to set CFG_CHIBI_BUFFERSIZE
 671                                 to an appropriately large value (ex. 1024)
 672     CFG_CHIBI_BUFFERSIZE        The size of the message buffer in bytes
 673
 674     DEPENDENCIES:               Chibi requires the use of SSP0, 16-bit timer
 675                                 0 and pins 3.1, 3.2, 3.3.  It also requires
 676                                 the presence of CFG_I2CEEPROM.
 677
 678     NOTE:                       These settings are not relevant to all boards!
 679                                 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
 680                                 show how 'CHIBI' is meant to be connected
 681     -----------------------------------------------------------------------*/
 682     #ifdef CFG_BRD_LPC1343_REFDESIGN
 683       // #define CFG_CHIBI
 684       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 685       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 686       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 687       #define CFG_CHIBI_PANID             (0x1234)
 688       #define CFG_CHIBI_PROMISCUOUS       (0)
 689       #define CFG_CHIBI_BUFFERSIZE        (128)
 690     #endif
 691
 692     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 693       // #define CFG_CHIBI
 694       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 695       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 696       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 697       #define CFG_CHIBI_PANID             (0x1234)
 698       #define CFG_CHIBI_PROMISCUOUS       (0)
 699       #define CFG_CHIBI_BUFFERSIZE        (128)
 700     #endif
 701
 702     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 703       #define CFG_CHIBI
 704       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 705       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 706       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 707       #define CFG_CHIBI_PANID             (0x1234)
 708       #define CFG_CHIBI_PROMISCUOUS       (0)
 709       #define CFG_CHIBI_BUFFERSIZE        (1024)
 710     #endif
 711 /*=========================================================================*/
 712
 713
 714 /*=========================================================================
 715     TFT LCD
 716     -----------------------------------------------------------------------
 717
 718     CFG_TFTLCD                  If defined, this will cause drivers for
 719                                 a pre-determined LCD screen to be included
 720                                 during build.  Only one LCD driver can be
 721                                 included during the build process (for ex.
 722                                 'drivers/lcd/hw/ILI9325.c')
 723     CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
 724                                 included for 3x6, 5x8, 7x8 and 8x8 fonts.
 725                                 This should only be enabled if these small
 726                                 fonts are required since there is already
 727                                 support for larger fonts generated with
 728                                 Dot Factory
 729                                 http://www.pavius.net/downloads/tools/53-the-dot-factory
 730     CFG_TFTLCD_TS_DEFAULTTHRESHOLD  Default minimum threshold to trigger a
 731                                 touch event with the touch screen (and exit
 732                                 from 'tsWaitForEvent' in touchscreen.c).
 733                                 Should be an 8-bit value somewhere between
 734                                 8 and 75 in normal circumstances.  This is
 735                                 the default value and may be overriden by
 736                                 a value stored in EEPROM.
 737     CFG_TFTLCD_TS_KEYPADDELAY   The delay in milliseconds between key
 738                                 presses in dialogue boxes
 739
 740     PIN LAYOUT:                 The pin layout that is used by this driver
 741                                 can be seen in the following schematic:
 742                                 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 743
 744     DEPENDENCIES:               TFTLCD requires the use of pins 1.8, 1.9,
 745                                 1.10, 1.11, 3.3 and 2.1-9.
 746     -----------------------------------------------------------------------*/
 747     #ifdef CFG_BRD_LPC1343_REFDESIGN
 748       // #define CFG_TFTLCD
 749       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 750       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 751       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 752     #endif
 753
 754     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 755       #define CFG_TFTLCD
 756       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 757       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 758       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 759     #endif
 760
 761     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 762       // #define CFG_TFTLCD
 763       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 764       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 765       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 766     #endif
 767 /*=========================================================================*/
 768
 769
 770 /*=========================================================================
 771     128x64 Graphic LCDs
 772     -----------------------------------------------------------------------
 773
 774     CFG_ST7565                If defined, this will cause drivers for
 775                               the 128x64 pixel ST7565 LCD to be included
 776     CFG_SSD1306               If defined, this will cause drivers for
 777                               the 128x64 pixel SSD1306 OLED display to be
 778                               included
 779
 780     Note:                     LPC1114 @ 36MHz and the ST7565 with the
 781                               backlight enabled consumes ~35mA
 782
 783     DEPENDENCIES:             ST7565 requires the use of pins 2.1-6.
 784     DEPENDENCIES:             SSD1306 requires the use of pins 2.1-6.
 785     -----------------------------------------------------------------------*/
 786     // #define CFG_ST7565
 787     // #define CFG_SSD1306
 788 /*=========================================================================*/
 789
 790
 791 /*=========================================================================
 792     RSA Encryption
 793     -----------------------------------------------------------------------
 794
 795     CFG_RSA                     If defined, support for basic RSA
 796                                 encryption will be included.
 797     CFG_RSA_BITS                Indicates the number of bits used for
 798                                 RSA encryption keys.  To keep code size
 799                                 reasonable, RSA encryption is currently
 800                                 limited to using 64-bit or 32-bit numbers,
 801                                 with 64-bit providing higher security, and
 802                                 32-bit providing smaller encrypted text
 803                                 size.
 804
 805     NOTE:                       Please note that Printf can not be
 806                                 used to display 64-bit values (%lld)!
 807     -----------------------------------------------------------------------*/
 808     // #define CFG_RSA
 809     #define CFG_RSA_BITS                  (32)
 810 /*=========================================================================*/
 811
 812
 813
 814
 815 /*=========================================================================
 816   CONFIG FILE VALIDATION
 817   -------------------------------------------------------------------------
 818   Basic error checking to make sure that incompatible defines are not
 819   enabled at the same time, etc.
 820
 821   =========================================================================*/
 822
 823 #if !defined CFG_BRD_LPC1343_REFDESIGN && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && !defined CFG_BRD_LPC1343_802154USBSTICK
 824   #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
 825 #endif
 826
 827 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
 828   #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
 829 #endif
 830
 831 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
 832   #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
 833 #endif
 834
 835 #if defined CFG_USBCDC && defined CFG_USBHID
 836   #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
 837 #endif
 838
 839 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
 840   #error "Only one SCK pin can be defined at a time for SSP0"
 841 #endif
 842
 843 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
 844   #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
 845 #endif
 846
 847 #ifdef CFG_INTERFACE
 848   #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
 849     #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
 850   #endif
 851   #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
 852     #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
 853   #endif
 854 #endif
 855
 856 #ifdef CFG_CHIBI
 857   #if !defined CFG_I2CEEPROM
 858     #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
 859   #endif
 860   #ifdef CFG_SDCARD
 861     #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
 862   #endif
 863   #ifdef CFG_TFTLCD
 864     #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
 865   #endif
 866   #ifdef CFG_PWM
 867     #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
 868   #endif
 869   #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
 870     #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
 871   #endif
 872 #endif
 873
 874 #ifdef CFG_TFTLCD
 875   #ifdef CFG_ST7565
 876     #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
 877   #endif
 878   #ifdef CFG_SSD1306
 879     #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
 880   #endif
 881   #ifdef CFG_PWM
 882     #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
 883   #endif
 884   #if !defined CFG_I2CEEPROM
 885     #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
 886   #endif
 887 #endif
 888
 889 #ifdef CFG_SDCARD
 890   #ifdef CFG_STEPPER
 891     #error  "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
 892   #endif
 893 #endif
 894
 895 #ifdef CFG_ST7565
 896   #ifdef CFG_SSD1306
 897     #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
 898   #endif
 899 #endif
 900
 901 #ifdef CFG_RSA
 902   #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
 903     #error "CFG_RSA_BITS must be equal to either 32 or 64."
 904   #endif
 905 #endif
 906
 907 #endif