projectconfig.h

   1 /**************************************************************************/
   2 /*!
   3     @file     projectconfig.h
   4     @author   K. Townsend (microBuilder.eu)
   5
   6     @section LICENSE
   7
   8     Software License Agreement (BSD License)
   9
  10     Copyright (c) 2012, microBuilder SARL
  11     All rights reserved.
  12
  13     Redistribution and use in source and binary forms, with or without
  14     modification, are permitted provided that the following conditions are met:
  15     1. Redistributions of source code must retain the above copyright
  16     notice, this list of conditions and the following disclaimer.
  17     2. Redistributions in binary form must reproduce the above copyright
  18     notice, this list of conditions and the following disclaimer in the
  19     documentation and/or other materials provided with the distribution.
  20     3. Neither the name of the copyright holders nor the
  21     names of its contributors may be used to endorse or promote products
  22     derived from this software without specific prior written permission.
  23
  24     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  25     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  26     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  28     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  29     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  31     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  32     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34 */
  35 /**************************************************************************/
  36
  37 #ifndef _PROJECTCONFIG_H_
  38 #define _PROJECTCONFIG_H_
  39
  40 #include "lpc134x.h"
  41 #include "sysdefs.h"
  42
  43 /*=========================================================================
  44     BOARD SELECTION
  45
  46     Because several boards use this code library with sometimes slightly
  47     different pin configuration, you will need to specify which board you
  48     are using by enabling one of the following definitions. The code base
  49     will then try to configure itself accordingly for that board.
  50
  51     CFG_BRD_LPC1343_REFDESIGN
  52     =========================
  53
  54         microBuilder.eu LPC1343 Reference Design base board with
  55         on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
  56
  57                 This is the recommended starting point for new development
  58                 since it makes it easy to send printf output to USB CDC, access
  59                 the on-board EEPROM, etc.
  60
  61     CFG_BRD_LPC1343_REFDESIGN_MINIMAL
  62     =================================
  63
  64         microBuilder.eu LPC1343 Reference Design base board with
  65         only the most common peripherals initialised by default.
  66
  67         Results in smallest code since EEPROM, USB, etc., are not
  68         initialised on startup.  By default, only the following
  69         peripherals are initialised by systemInit():
  70
  71               - CPU (Configures the PLL, etc.)
  72               - GPIO
  73               - SysTick Timer
  74               - UART (with printf support) *
  75
  76         * Can be removed to save 0.8kb in debug and 0.3 kb in
  77         release. Comment out 'CFG_PRINTF_UART' to disable it.
  78
  79         The code size can be further reduced by several KB by removing
  80         any IRQ Handlers that are not used.  The I2C IRQHandler, for
  81         example, uses ~1KB of flash in debug and ~400KB in release mode,
  82         but because it is referenced in the startup code it is always
  83         included even if I2C is never used in the project.
  84
  85         Other IRQ Handlers that you might be able to comment out
  86         to save some space are:
  87
  88         IRQ Handler               Debug   Release
  89         ------------------------- ------  -------
  90         I2C_IRQHandler            1160 b    400 b
  91         SSP_IRQHandler             160 b     76 b
  92         UART_IRQHandler            246 b    116 b
  93         WAKEUP_IRQHandler          160 b    100 b
  94         WDT_IRQHandler              50 b     28 b
  95
  96     CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
  97     ====================================
  98
  99         microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
 100         for the CLI interface.
 101
 102     CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 103     =====================================
 104
 105         microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
 106         for the CLI interface.
 107
 108     CFG_BRD_LPC1343_802154USBSTICK
 109     ==============================
 110
 111         microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
 112
 113     CFG_BRD_LPC1343_OLIMEX_P
 114     ==============================
 115
 116         Simple Olimex LPC1343 breakout board
 117
 118     CFG_BRD_LPC1343_LPCXPRESSO
 119     ==============================
 120
 121         LPC1343 LPCXpresso board
 122
 123     -----------------------------------------------------------------------*/
 124     #define CFG_BRD_LPC1343_REFDESIGN
 125     // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 126     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 127     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 128     // #define CFG_BRD_LPC1343_802154USBSTICK
 129     // #define CFG_BRD_LPC1343_OLIMEX_P
 130     // #define CFG_BRD_LPC1343_LPCXPRESSO
 131 /*=========================================================================*/
 132
 133
 134 /**************************************************************************
 135     PIN USAGE
 136     -----------------------------------------------------------------------
 137     This table tries to give an indication of which GPIO pins and
 138     peripherals are used by the available drivers and SW examples.  Only
 139     dedicated GPIO pins available on the LPC1343 Reference Board are shown
 140     below.  Any unused peripheral blocks like I2C, SSP, ADC, etc., can
 141     also be used as GPIO if they are available.
 142
 143                 PORT 1        PORT 2                PORT 3
 144                 =========     =================     =======
 145                 8 9 10 11     1 2 3 4 5 6 7 8 9     0 1 2 3
 146
 147     SDCARD      . .  .  .     . . . . . . . . .     X . . .
 148     PWM         . X  .  .     . . . . . . . . .     . . . .
 149     STEPPER     . .  .  .     . . . . . . . . .     X X X X
 150     CHIBI       X X  X  .     . . . . . . . . .     . . . .
 151     ILI9325/8   X X  X  X     X X X X X X X X X     . . . X
 152     ST7565      X X  X  X     X X X X X X X X X     . . . X
 153     ST7735      . .  .  .     X X X X X X . . .     . . . .
 154     SHARPMEM    . .  .  .     X X X X . . . . .     . . . .
 155     SSD1306 SPI . .  .  .     X X X . X X . . .     . . . .
 156     SSD1351     . .  .  .     X X X X X . . . .     . . . .
 157     MCP121      . .  .  .     . . . . . . . . .     . X . .
 158     PN532 [3]   . .  .  .     . . . . . . . . .     . X X .
 159
 160                 TIMERS                    SSP     ADC         UART
 161                 ======================    ===     =======     ====
 162                 16B0  16B1  32B0  32B1    0       0 1 2 3     0
 163
 164     SDCARD      .     .     .     .       X       . . . .     .
 165     PWM         .     X     .     .       .       . . . .     .
 166     PMU [1]     .     .     X     .       .       . . . .     .
 167     USB         .     .     .     X       .       . . . .     .
 168     STEPPER     .     .     X     .       .       . . . .     .
 169     CHIBI       x     .     .     .       X       . . . .     .
 170     ILI9325/8   .     .     .     .       .       X X X X     .
 171     ST7565      .     .     .     .       .       X X X X     .
 172     ST7535      .     .     .     .       .       . . . .     .
 173     SHARPMEM    .     .     .     .       .       . . . .     .
 174     SSD1306 SPI .     .     .     .       .       . . . .     .
 175     INTERFACE   .     .     .     .       .       . . . .     X[2]
 176
 177     [1]  PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep.  This timer
 178          can safely be used by other peripherals, but may need to be
 179          reconfigured when you wakeup from deep-sleep.
 180     [2]  INTERFACE can be configured to use either USBCDC or UART
 181     [3]  P3.2 is only used with the I2C bus (for IRQ)
 182
 183  **************************************************************************/
 184
 185
 186 /**************************************************************************
 187     I2C Addresses
 188     -----------------------------------------------------------------------
 189     The following addresses are used by the different I2C sensors included
 190     in the code base [1]
 191
 192                                 HEX       BINARY
 193                                 ====      ========
 194     ISL12022M (RTC)             0xDE      1101111x
 195     ISL12022M (SRAM)            0xAE      1010111x
 196     LM75B                       0x90      1001000x
 197     MCP24AA                     0xA0      1010000x
 198     MCP4725                     0xC0      1100000x
 199     TSL2561                     0x72      0111001x
 200     TCS3414                     0x72      0111001x
 201     PN532                       0x48      0100100x
 202     SSD1306_I2C                 0x78      0111100x  // Assumes SA0 = GND
 203
 204     [1]  Alternative addresses may exists, but the addresses listed in this
 205          table are the values used in the code base
 206
 207  **************************************************************************/
 208
 209
 210 /*=========================================================================
 211     FIRMWARE VERSION SETTINGS
 212     -----------------------------------------------------------------------*/
 213     #define CFG_FIRMWARE_VERSION_MAJOR            (1)
 214     #define CFG_FIRMWARE_VERSION_MINOR            (1)
 215     #define CFG_FIRMWARE_VERSION_REVISION         (0)
 216 /*=========================================================================*/
 217
 218
 219 /*=========================================================================
 220     CORE CPU SETTINGS
 221     -----------------------------------------------------------------------
 222
 223     CFG_CPU_CCLK    Value is for reference only.  'core/cpu/cpu.c' must
 224                     be modified to change the clock speed, but the value
 225                     should be indicated here since CFG_CPU_CCLK is used by
 226                     other peripherals to determine timing.
 227
 228     -----------------------------------------------------------------------*/
 229     #define CFG_CPU_CCLK                (72000000)  // 1 tick = 13.88nS
 230 /*=========================================================================*/
 231
 232
 233 /*=========================================================================
 234     SYSTICK TIMER
 235     -----------------------------------------------------------------------
 236
 237     CFG_SYSTICK_DELAY_IN_MS   The number of milliseconds between each tick
 238                               of the systick timer.
 239
 240     -----------------------------------------------------------------------*/
 241     #define CFG_SYSTICK_DELAY_IN_MS     (1)
 242 /*=========================================================================*/
 243
 244
 245 /*=========================================================================
 246     GPIO INTERRUPTS
 247     -----------------------------------------------------------------------
 248
 249     IF you wish to use the GPIO interrupt handlers elsewhere in your code,
 250     you should probably define a seperate IRQHandler for the appropriate
 251     GPIO bank rather than using the definitions in core/gpio/gpio.c (to
 252     avoid causing problems in other projects, and to make updates easier,
 253     etc.)  To disable the default IRQHandler, simply comment out the
 254     define below for the appropriate GPIO bank and implement the handler
 255     somewhere else.
 256
 257     GPIO_ENABLE_IRQ0    If defined, PIOINT0_IRQHandler will be declared and
 258                         handled in core/gpio/gpio.c
 259     GPIO_ENABLE_IRQ1    If defined, PIOINT1_IRQHandler will be declared and
 260                         handled in core/gpio/gpio.c
 261     GPIO_ENABLE_IRQ2    If defined, PIOINT2_IRQHandler will be declared and
 262                         handled in core/gpio/gpio.c
 263     GPIO_ENABLE_IRQ3    If defined, PIOINT3_IRQHandler will be declared and
 264                         handled in core/gpio/gpio.c
 265
 266     -----------------------------------------------------------------------*/
 267     #ifdef CFG_BRD_LPC1343_REFDESIGN
 268       // #define GPIO_ENABLE_IRQ0
 269       #define GPIO_ENABLE_IRQ1
 270       // #define GPIO_ENABLE_IRQ2
 271       // #define GPIO_ENABLE_IRQ3
 272     #endif
 273
 274     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 275       // #define GPIO_ENABLE_IRQ0
 276       #define GPIO_ENABLE_IRQ1
 277       // #define GPIO_ENABLE_IRQ2
 278       // #define GPIO_ENABLE_IRQ3
 279     #endif
 280
 281     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 282       // #define GPIO_ENABLE_IRQ0
 283       #define GPIO_ENABLE_IRQ1
 284       // #define GPIO_ENABLE_IRQ2
 285       // #define GPIO_ENABLE_IRQ3
 286     #endif
 287
 288     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 289       // #define GPIO_ENABLE_IRQ0
 290       #define GPIO_ENABLE_IRQ1
 291       // #define GPIO_ENABLE_IRQ2
 292       // #define GPIO_ENABLE_IRQ3
 293     #endif
 294
 295     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 296       // #define GPIO_ENABLE_IRQ0
 297       #define GPIO_ENABLE_IRQ1
 298       // #define GPIO_ENABLE_IRQ2
 299       // #define GPIO_ENABLE_IRQ3
 300     #endif
 301
 302     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 303       // #define GPIO_ENABLE_IRQ0
 304       #define GPIO_ENABLE_IRQ1
 305       // #define GPIO_ENABLE_IRQ2
 306       // #define GPIO_ENABLE_IRQ3
 307     #endif
 308
 309     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 310       // #define GPIO_ENABLE_IRQ0
 311       #define GPIO_ENABLE_IRQ1
 312       // #define GPIO_ENABLE_IRQ2
 313       // #define GPIO_ENABLE_IRQ3
 314     #endif
 315 /*=========================================================================*/
 316
 317
 318 /*=========================================================================
 319     ALTERNATE RESET PIN
 320     -----------------------------------------------------------------------
 321
 322     CFG_ALTRESET        If defined, indicates that a GPIO pin should be
 323                         configured as an alternate reset pin in addition
 324                         to the dedicated reset pin.
 325     CFG_ALTRESET_PORT   The GPIO port where the alt reset pin is located
 326     CFG_ALTRESET_PIN    The GPIO pin where the alt reset pin is located
 327
 328     -----------------------------------------------------------------------*/
 329     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 330       #define CFG_ALTRESET
 331       #define CFG_ALTRESET_PORT         (1)
 332       #define CFG_ALTRESET_PIN          (5)   // P1.5 = RTS
 333     #endif
 334 /*=========================================================================*/
 335
 336
 337 /*=========================================================================
 338     UART
 339     -----------------------------------------------------------------------
 340
 341     CFG_UART_BAUDRATE         The default UART speed.  This value is used
 342                               when initialising UART, and should be a
 343                               standard value like 57600, 9600, etc.
 344                               NOTE: This value may be overridden if
 345                               another value is stored in EEPROM!
 346     CFG_UART_BUFSIZE          The length in bytes of the UART RX FIFO. This
 347                               will determine the maximum number of received
 348                               characters to store in memory.
 349
 350     -----------------------------------------------------------------------*/
 351     #ifdef CFG_BRD_LPC1343_REFDESIGN
 352       #define CFG_UART_BAUDRATE           (115200)
 353       #define CFG_UART_BUFSIZE            (512)
 354     #endif
 355
 356     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 357       #define CFG_UART_BAUDRATE           (115200)
 358       #define CFG_UART_BUFSIZE            (512)
 359     #endif
 360
 361     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 362       #define CFG_UART_BAUDRATE           (115200)
 363       #define CFG_UART_BUFSIZE            (512)
 364     #endif
 365
 366     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 367       #define CFG_UART_BAUDRATE           (57600)
 368       #define CFG_UART_BUFSIZE            (512)
 369     #endif
 370
 371     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 372       #define CFG_UART_BAUDRATE           (115200)
 373       #define CFG_UART_BUFSIZE            (512)
 374     #endif
 375
 376     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 377       #define CFG_UART_BAUDRATE           (115200)
 378       #define CFG_UART_BUFSIZE            (512)
 379     #endif
 380
 381     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 382       #define CFG_UART_BAUDRATE           (115200)
 383       #define CFG_UART_BUFSIZE            (512)
 384     #endif
 385 /*=========================================================================*/
 386
 387
 388 /*=========================================================================
 389     SSP
 390     -----------------------------------------------------------------------
 391
 392     CFG_SSP0_SCKPIN_2_11      Indicates which pin should be used for SCK0
 393     CFG_SSP0_SCKPIN_0_6
 394
 395     -----------------------------------------------------------------------*/
 396     #ifdef CFG_BRD_LPC1343_REFDESIGN
 397       #define CFG_SSP0_SCKPIN_2_11
 398       // #define CFG_SSP0_SCKPIN_0_6
 399     #endif
 400
 401     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 402       #define CFG_SSP0_SCKPIN_2_11
 403       // #define CFG_SSP0_SCKPIN_0_6
 404     #endif
 405
 406     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 407       #define CFG_SSP0_SCKPIN_2_11
 408       // #define CFG_SSP0_SCKPIN_0_6
 409     #endif
 410
 411     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 412       // #define CFG_SSP0_SCKPIN_2_11
 413       #define CFG_SSP0_SCKPIN_0_6
 414     #endif
 415
 416     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 417       #define CFG_SSP0_SCKPIN_2_11
 418       // #define CFG_SSP0_SCKPIN_0_6
 419     #endif
 420
 421     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 422       #define CFG_SSP0_SCKPIN_2_11
 423       // #define CFG_SSP0_SCKPIN_0_6
 424     #endif
 425 /*=========================================================================*/
 426
 427
 428 /*=========================================================================
 429     ADC
 430     -----------------------------------------------------------------------
 431
 432     ADC_AVERAGING_ENABLE      To get better results, the ADC code can take
 433                               a number of samples and return the average
 434                               value.  This is slower, but can give more
 435                               accurate results compared to single-reading.
 436
 437                               To enable averaging, set ADC_AVERAGING_ENABLE
 438                               to a non-zero value.
 439     ADC_AVERAGING_SAMPLES     The number of ADC samples to read and
 440                               average if ADC averaging is enabled.
 441
 442     -----------------------------------------------------------------------*/
 443     #ifdef CFG_BRD_LPC1343_REFDESIGN
 444       #define ADC_AVERAGING_ENABLE    (1)
 445       #define ADC_AVERAGING_SAMPLES   (5)
 446     #endif
 447
 448     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 449       #define ADC_AVERAGING_ENABLE    (1)
 450       #define ADC_AVERAGING_SAMPLES   (5)
 451     #endif
 452
 453     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 454       #define ADC_AVERAGING_ENABLE    (0)
 455       #define ADC_AVERAGING_SAMPLES   (5)
 456     #endif
 457
 458     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 459       #define ADC_AVERAGING_ENABLE    (0)
 460       #define ADC_AVERAGING_SAMPLES   (5)
 461     #endif
 462
 463     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 464       #define ADC_AVERAGING_ENABLE    (0)
 465       #define ADC_AVERAGING_SAMPLES   (5)
 466     #endif
 467
 468     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 469       #define ADC_AVERAGING_ENABLE    (0)
 470       #define ADC_AVERAGING_SAMPLES   (5)
 471     #endif
 472 /*=========================================================================*/
 473
 474
 475 /*=========================================================================
 476     ON-BOARD LED
 477     -----------------------------------------------------------------------
 478
 479     CFG_LED_PORT              The port for the on board LED
 480     CFG_LED_PIN               The pin for the on board LED
 481     CFG_LED_ON                The pin state to turn the LED on (0 = low, 1 = high)
 482     CFG_LED_OFF               The pin state to turn the LED off (0 = low, 1 = high)
 483
 484     -----------------------------------------------------------------------*/
 485     #ifdef CFG_BRD_LPC1343_REFDESIGN
 486       #define CFG_LED_PORT                (2)
 487       #define CFG_LED_PIN                 (10)
 488       #define CFG_LED_ON                  (0)
 489       #define CFG_LED_OFF                 (1)
 490     #endif
 491
 492     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 493       #define CFG_LED_PORT                (2)
 494       #define CFG_LED_PIN                 (10)
 495       #define CFG_LED_ON                  (0)
 496       #define CFG_LED_OFF                 (1)
 497     #endif
 498
 499     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 500       #define CFG_LED_PORT                (2)
 501       #define CFG_LED_PIN                 (10)
 502       #define CFG_LED_ON                  (0)
 503       #define CFG_LED_OFF                 (1)
 504     #endif
 505
 506     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 507       #define CFG_LED_PORT                (3)
 508       #define CFG_LED_PIN                 (2)
 509       #define CFG_LED_ON                  (0)
 510       #define CFG_LED_OFF                 (1)
 511     #endif
 512
 513     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 514       #define CFG_LED_PORT                (3)
 515       #define CFG_LED_PIN                 (2)
 516       #define CFG_LED_ON                  (0)
 517       #define CFG_LED_OFF                 (1)
 518     #endif
 519
 520     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 521       #define CFG_LED_PORT                (0)
 522       #define CFG_LED_PIN                 (7)
 523       #define CFG_LED_ON                  (0)
 524       #define CFG_LED_OFF                 (1)
 525     #endif
 526 /*=========================================================================*/
 527
 528
 529 /*=========================================================================
 530     MICRO-SD CARD
 531     -----------------------------------------------------------------------
 532
 533     CFG_SDCARD                If this field is defined SD Card and FAT32
 534                               file system support will be included
 535     CFG_SDCARD_READONLY       If this is set to 1, all commands to
 536                               write to the SD card will be removed
 537                               saving some flash space.
 538     CFG_SDCARD_CDPORT         The card detect port number
 539     CFG_SDCARD_CDPIN          The card detect pin number
 540
 541     NOTE:                     All config settings for FAT32 are defined
 542                               in ffconf.h
 543
 544     BENCHMARK:                With SPI set to 6.0MHz, FATFS can read
 545                               ~300KB/s (w/512 byte read buffer)
 546
 547     PIN LAYOUT:               The pin layout that is used by this driver
 548                               can be seen in the following schematic:
 549                               /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 550
 551     DEPENDENCIES:             SDCARD requires the use of SSP0.
 552     -----------------------------------------------------------------------*/
 553     #ifdef CFG_BRD_LPC1343_REFDESIGN
 554       // #define CFG_SDCARD
 555       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 556       #define CFG_SDCARD_CDPORT           (3)
 557       #define CFG_SDCARD_CDPIN            (0)
 558     #endif
 559
 560     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 561       // #define CFG_SDCARD
 562       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 563       #define CFG_SDCARD_CDPORT           (3)
 564       #define CFG_SDCARD_CDPIN            (0)
 565     #endif
 566
 567     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 568       #define CFG_SDCARD
 569       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 570       #define CFG_SDCARD_CDPORT           (3)
 571       #define CFG_SDCARD_CDPIN            (0)
 572     #endif
 573
 574     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 575       // #define CFG_SDCARD
 576       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 577       #define CFG_SDCARD_CDPORT           (3)
 578       #define CFG_SDCARD_CDPIN            (0)
 579     #endif
 580
 581     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 582       // #define CFG_SDCARD
 583       #define CFG_SDCARD_READONLY         (1) // Must be 0 or 1
 584       #define CFG_SDCARD_CDPORT           (3)
 585       #define CFG_SDCARD_CDPIN            (0)
 586     #endif
 587
 588     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 589       // #define CFG_SDCARD
 590       #define CFG_SDCARD_READONLY         (1) // Must be 0 or 1
 591       #define CFG_SDCARD_CDPORT           (3)
 592       #define CFG_SDCARD_CDPIN            (0)
 593     #endif
 594 /*=========================================================================*/
 595
 596
 597 /*=========================================================================
 598     USB
 599     -----------------------------------------------------------------------
 600
 601     CFG_USBHID                If this field is defined USB HID support will
 602                               be included.  Currently uses ROM-based USB HID
 603     CFG_USBCDC                If this field is defined USB CDC support will
 604                               be included, with the USB Serial Port speed
 605                               set to 115200 BPS by default
 606     CFG_USBCDC_BAUDRATE       The default TX/RX speed.  This value is used
 607                               when initialising USBCDC, and should be a
 608                               standard value like 57600, 9600, etc.
 609     CFG_USBCDC_INITTIMEOUT    The maximum delay in milliseconds to wait for
 610                               USB to connect.  Must be a multiple of 10!
 611     CFG_USBCDC_BUFFERSIZE     Size of the buffer (in bytes) that stores
 612                               printf data until it can be sent out in
 613                               64 byte frames.  The buffer is required since
 614                               only one frame per ms can be sent using USB
 615                               CDC (see 'puts' in systeminit.c).
 616
 617     -----------------------------------------------------------------------*/
 618     #define CFG_USB_VID                   (0x239A)
 619     #define CFG_USB_PID                   (0x1002)
 620
 621     #ifdef CFG_BRD_LPC1343_REFDESIGN
 622       // #define CFG_USBHID
 623       #define CFG_USBCDC
 624       #define CFG_USBCDC_BAUDRATE         (115200)
 625       #define CFG_USBCDC_INITTIMEOUT      (5000)
 626       #define CFG_USBCDC_BUFFERSIZE       (256)
 627     #endif
 628
 629     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 630       // #define CFG_USBHID
 631       // #define CFG_USBCDC
 632       #define CFG_USBCDC_BAUDRATE         (115200)
 633       #define CFG_USBCDC_INITTIMEOUT      (5000)
 634       #define CFG_USBCDC_BUFFERSIZE       (256)
 635     #endif
 636
 637     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 638       // #define CFG_USBHID
 639       #define CFG_USBCDC
 640       #define CFG_USBCDC_BAUDRATE         (115200)
 641       #define CFG_USBCDC_INITTIMEOUT      (5000)
 642       #define CFG_USBCDC_BUFFERSIZE       (256)
 643     #endif
 644
 645     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 646       // #define CFG_USBHID
 647       // #define CFG_USBCDC
 648       #define CFG_USBCDC_BAUDRATE         (57600)
 649       #define CFG_USBCDC_INITTIMEOUT      (5000)
 650       #define CFG_USBCDC_BUFFERSIZE       (256)
 651     #endif
 652
 653     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 654       // #define CFG_USBHID
 655       #define CFG_USBCDC
 656       #define CFG_USBCDC_BAUDRATE         (115200)
 657       #define CFG_USBCDC_INITTIMEOUT      (5000)
 658       #define CFG_USBCDC_BUFFERSIZE       (256)
 659     #endif
 660
 661     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 662       // #define CFG_USBHID
 663       #define CFG_USBCDC
 664       #define CFG_USBCDC_BAUDRATE         (115200)
 665       #define CFG_USBCDC_INITTIMEOUT      (5000)
 666       #define CFG_USBCDC_BUFFERSIZE       (256)
 667     #endif
 668
 669     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 670       // #define CFG_USBHID
 671       #define CFG_USBCDC
 672       #define CFG_USBCDC_BAUDRATE         (115200)
 673       #define CFG_USBCDC_INITTIMEOUT      (5000)
 674       #define CFG_USBCDC_BUFFERSIZE       (256)
 675     #endif
 676 /*=========================================================================*/
 677
 678
 679 /*=========================================================================
 680     PRINTF REDIRECTION
 681     -----------------------------------------------------------------------
 682
 683     CFG_PRINTF_MAXSTRINGSIZE  Maximum size of string buffer for printf
 684     CFG_PRINTF_UART           Will cause all printf statements to be
 685                               redirected to UART
 686     CFG_PRINTF_USBCDC         Will cause all printf statements to be
 687                               redirect to USB Serial
 688     CFG_PRINTF_NEWLINE        This is typically "\r\n" for Windows or
 689                               "\n" for *nix
 690
 691     Note: If no printf redirection definitions are present, all printf
 692     output will be ignored.
 693     -----------------------------------------------------------------------*/
 694     #ifdef CFG_BRD_LPC1343_REFDESIGN
 695       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 696       // #define CFG_PRINTF_UART
 697       #define CFG_PRINTF_USBCDC
 698       #define CFG_PRINTF_NEWLINE          "\r\n"
 699     #endif
 700
 701     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 702       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 703       #define CFG_PRINTF_UART
 704       // #define CFG_PRINTF_USBCDC
 705       #define CFG_PRINTF_NEWLINE          "\r\n"
 706     #endif
 707
 708     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 709       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 710       // #define CFG_PRINTF_UART
 711       #define CFG_PRINTF_USBCDC
 712       #define CFG_PRINTF_NEWLINE          "\r\n"
 713     #endif
 714
 715     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 716       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 717       #define CFG_PRINTF_UART
 718       // #define CFG_PRINTF_USBCDC
 719       #define CFG_PRINTF_NEWLINE          "\n"
 720     #endif
 721
 722     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 723       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 724       // #define CFG_PRINTF_UART
 725       #define CFG_PRINTF_USBCDC
 726       #define CFG_PRINTF_NEWLINE          "\r\n"
 727     #endif
 728
 729     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 730       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 731       // #define CFG_PRINTF_UART
 732       #define CFG_PRINTF_USBCDC
 733       #define CFG_PRINTF_NEWLINE          "\r\n"
 734     #endif
 735
 736     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 737       #define CFG_PRINTF_MAXSTRINGSIZE    (255)
 738       // #define CFG_PRINTF_UART
 739       #define CFG_PRINTF_USBCDC
 740       #define CFG_PRINTF_NEWLINE          "\r\n"
 741     #endif
 742 /*=========================================================================*/
 743
 744
 745 /*=========================================================================
 746     COMMAND LINE INTERFACE
 747     -----------------------------------------------------------------------
 748
 749     CFG_INTERFACE             If this field is defined the UART or USBCDC
 750                               based command-line interface will be included
 751     CFG_INTERFACE_MAXMSGSIZE  The maximum number of bytes to accept for an
 752                               incoming command
 753     CFG_INTERFACE_PROMPT      The command prompt to display at the start
 754                               of every new data entry line
 755     CFG_INTERFACE_SILENTMODE  If this is set to 1 only text generated in
 756                               response to commands will be send to the
 757                               output buffer.  The command prompt will not
 758                               be displayed and incoming text will not be
 759                               echoed back to the output buffer (allowing
 760                               you to see the text you have input).  This
 761                               is normally only desirable in a situation
 762                               where another MCU is communicating with
 763                               the LPC1343.
 764     CFG_INTERFACE_DROPCR      If this is set to 1 all incoming \r
 765                               characters will be dropped
 766     CFG_INTERFACE_ENABLEIRQ   If this is set to 1 the IRQ pin will be
 767                               set high when a command starts executing
 768                               and will go low when the command has
 769                               finished executing or the LCD is not busy.
 770                               This allows another device to know when a
 771                               new command can safely be sent.
 772     CFG_INTERFACE_IRQPORT     The gpio port for the IRQ/busy pin
 773     CFG_INTERFACE_IRQPIN      The gpio pin number for the IRQ/busy pin
 774     CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
 775                               error messages will be returned (followed
 776                               by CFG_PRINTF_NEWLINE), rather than more
 777                               verbose error messages.  The specific
 778                               characters used are defined below.
 779     CFG_INTERFACE_CONFIRMREADY  If this is set to 1 a text confirmation
 780                               will be sent when the command prompt is
 781                               ready for a new command.  This is in
 782                               addition to CFG_INTERFACE_ENABLEIRQ if
 783                               this is also enabled.  The character used
 784                               is defined below.
 785
 786     NOTE:                     The command-line interface will use either
 787                               USB-CDC or UART depending on whether
 788                               CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
 789                               selected.
 790     -----------------------------------------------------------------------*/
 791     #ifdef CFG_BRD_LPC1343_REFDESIGN
 792       #define CFG_INTERFACE
 793       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 794       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 795       #define CFG_INTERFACE_SILENTMODE    (0)
 796       #define CFG_INTERFACE_DROPCR        (0)
 797       #define CFG_INTERFACE_ENABLEIRQ     (0)
 798       #define CFG_INTERFACE_IRQPORT       (0)
 799       #define CFG_INTERFACE_IRQPIN        (7)
 800       #define CFG_INTERFACE_SHORTERRORS   (0)
 801       #define CFG_INTERFACE_CONFIRMREADY  (0)
 802     #endif
 803
 804     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 805       // #define CFG_INTERFACE
 806       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 807       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 808       #define CFG_INTERFACE_SILENTMODE    (0)
 809       #define CFG_INTERFACE_DROPCR        (0)
 810       #define CFG_INTERFACE_ENABLEIRQ     (0)
 811       #define CFG_INTERFACE_IRQPORT       (0)
 812       #define CFG_INTERFACE_IRQPIN        (7)
 813       #define CFG_INTERFACE_SHORTERRORS   (0)
 814       #define CFG_INTERFACE_CONFIRMREADY  (0)
 815     #endif
 816
 817     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 818       #define CFG_INTERFACE
 819       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 820       #define CFG_INTERFACE_PROMPT        "CMD >> "
 821       #define CFG_INTERFACE_SILENTMODE    (0)
 822       #define CFG_INTERFACE_DROPCR        (0)
 823       #define CFG_INTERFACE_ENABLEIRQ     (0)
 824       #define CFG_INTERFACE_IRQPORT       (0)
 825       #define CFG_INTERFACE_IRQPIN        (7)
 826       #define CFG_INTERFACE_SHORTERRORS   (0)
 827       #define CFG_INTERFACE_CONFIRMREADY  (0)
 828       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 829       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 830       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 831       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 832     #endif
 833
 834     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 835       #define CFG_INTERFACE
 836       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 837       #define CFG_INTERFACE_PROMPT        ">>"
 838       #define CFG_INTERFACE_SILENTMODE    (1)
 839       #define CFG_INTERFACE_DROPCR        (1)
 840       #define CFG_INTERFACE_ENABLEIRQ     (1)
 841       #define CFG_INTERFACE_IRQPORT       (0)
 842       #define CFG_INTERFACE_IRQPIN        (7)
 843       #define CFG_INTERFACE_SHORTERRORS   (1)
 844       #define CFG_INTERFACE_CONFIRMREADY  (0)
 845       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 846       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 847       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 848       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 849     #endif
 850
 851     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 852       // #define CFG_INTERFACE
 853       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 854       #define CFG_INTERFACE_PROMPT        "CMD >> "
 855       #define CFG_INTERFACE_SILENTMODE    (0)
 856       #define CFG_INTERFACE_DROPCR        (0)
 857       #define CFG_INTERFACE_ENABLEIRQ     (0)
 858       #define CFG_INTERFACE_IRQPORT       (0)
 859       #define CFG_INTERFACE_IRQPIN        (7)
 860       #define CFG_INTERFACE_SHORTERRORS   (0)
 861       #define CFG_INTERFACE_CONFIRMREADY  (0)
 862     #endif
 863
 864     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 865       #define CFG_INTERFACE
 866       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 867       #define CFG_INTERFACE_PROMPT        "LPC-P1343 >> "
 868       #define CFG_INTERFACE_SILENTMODE    (0)
 869       #define CFG_INTERFACE_DROPCR        (0)
 870       #define CFG_INTERFACE_ENABLEIRQ     (0)
 871       #define CFG_INTERFACE_IRQPORT       (0)
 872       #define CFG_INTERFACE_IRQPIN        (7)
 873       #define CFG_INTERFACE_SHORTERRORS   (0)
 874       #define CFG_INTERFACE_CONFIRMREADY  (0)
 875     #endif
 876
 877     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 878       #define CFG_INTERFACE
 879       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 880       #define CFG_INTERFACE_PROMPT        "LPC-P1343 >> "
 881       #define CFG_INTERFACE_SILENTMODE    (0)
 882       #define CFG_INTERFACE_DROPCR        (0)
 883       #define CFG_INTERFACE_ENABLEIRQ     (0)
 884       #define CFG_INTERFACE_IRQPORT       (0)
 885       #define CFG_INTERFACE_IRQPIN        (7)
 886       #define CFG_INTERFACE_SHORTERRORS   (0)
 887       #define CFG_INTERFACE_CONFIRMREADY  (0)
 888     #endif
 889 /*=========================================================================*/
 890
 891
 892 /*=========================================================================
 893     PWM SETTINGS
 894     -----------------------------------------------------------------------
 895
 896     CFG_PWM                     If this is defined, a basic PWM driver
 897                                 will be included using 16-bit Timer 1 and
 898                                 Pin 1.9 (MAT0) for the PWM output.  In
 899                                 order to allow for a fixed number of
 900                                 pulses to be generated, some PWM-specific
 901                                 code is required in the 16-Bit Timer 1
 902                                 ISR.  See "core/timer16/timer16.c" for
 903                                 more information.
 904     CFG_PWM_DEFAULT_PULSEWIDTH  The default pulse width in ticks
 905     CFG_PWM_DEFAULT_DUTYCYCLE   The default duty cycle in percent
 906
 907     DEPENDENCIES:               PWM output requires the use of 16-bit
 908                                 timer 1 and pin 1.9 (CT16B1_MAT0).
 909     -----------------------------------------------------------------------*/
 910     // #define CFG_PWM
 911     #define CFG_PWM_DEFAULT_PULSEWIDTH  (CFG_CPU_CCLK / 1000)
 912     #define CFG_PWM_DEFAULT_DUTYCYCLE   (50)
 913 /*=========================================================================*/
 914
 915
 916 /*=========================================================================
 917     STEPPER MOTOR SETTINGS
 918     -----------------------------------------------------------------------
 919
 920     CFG_STEPPER                 If this is defined, a simple bi-polar
 921                                 stepper motor will be included for common
 922                                 H-bridge chips like the L293D or SN754410N
 923
 924     DEPENDENCIES:               STEPPER requires the use of pins 3.0-3 and
 925                                 32-bit Timer 0.
 926     -----------------------------------------------------------------------*/
 927     // #define CFG_STEPPER
 928 /*=========================================================================*/
 929
 930
 931 /*=========================================================================
 932     EEPROM
 933     -----------------------------------------------------------------------
 934
 935     CFG_I2CEEPROM             If defined, drivers for the onboard EEPROM
 936                               will be included during build
 937     CFG_I2CEEPROM_SIZE        The number of bytes available on the EEPROM
 938
 939     -----------------------------------------------------------------------*/
 940     #ifdef CFG_BRD_LPC1343_REFDESIGN
 941       #define CFG_I2CEEPROM
 942       #define CFG_I2CEEPROM_SIZE          (3072)
 943     #endif
 944
 945     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 946       // #define CFG_I2CEEPROM
 947       #define CFG_I2CEEPROM_SIZE          (3072)
 948     #endif
 949
 950     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 951       #define CFG_I2CEEPROM
 952       #define CFG_I2CEEPROM_SIZE          (3072)
 953     #endif
 954
 955     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 956       #define CFG_I2CEEPROM
 957       #define CFG_I2CEEPROM_SIZE          (3072)
 958     #endif
 959
 960     #ifdef CFG_BRD_LPC1343_OLIMEX_P
 961       // #define CFG_I2CEEPROM
 962       #define CFG_I2CEEPROM_SIZE          (3072)
 963     #endif
 964
 965     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
 966       // #define CFG_I2CEEPROM
 967       #define CFG_I2CEEPROM_SIZE          (3072)
 968     #endif
 969 /*=========================================================================*/
 970
 971
 972 /*=========================================================================
 973     EEPROM MEMORY MAP
 974     -----------------------------------------------------------------------
 975     EEPROM is used to persist certain user modifiable values to make
 976     sure that these changes remain in effect after a reset or hard
 977     power-down.  The addresses in EEPROM for these various system
 978     settings/values are defined below.  The first 256 bytes of EEPROM
 979     are reserved for this (0x0000..0x00FF).
 980
 981     CFG_EEPROM_RESERVED       The last byte of reserved EEPROM memory
 982
 983           EEPROM Address (0x0000..0x00FF)
 984           ===============================
 985           0 1 2 3 4 5 6 7 8 9 A B C D E F
 986     000x  x x x x x x x x . x x . . . . .   Chibi
 987     001x  . . . . . . . . . . . . . . . .
 988     002x  x x x x . . . . . . . . . . . .   UART
 989     003x  x x x x x x x x x x x x x x x x   Touch Screen Calibration
 990     004x  x x x x x x x x x x x x x x . .   Touch Screen Calibration
 991     005x  . . . . . . . . . . . . . . . .
 992     006x  . . . . . . . . . . . . . . . .
 993     007x  . . . . . . . . . . . . . . . .
 994     008x  . . . . . . . . . . . . . . . .
 995     009x  . . . . . . . . . . . . . . . .
 996     00Ax  . . . . . . . . . . . . . . . .
 997     00Bx  . . . . . . . . . . . . . . . .
 998     00Cx  . . . . . . . . . . . . . . . .
 999     00Dx  . . . . . . . . . . . . . . . .
1000     00Ex  . . . . . . . . . . . . . . . .
1001     00Fx  . . . . . . . . . . . . . . . .
1002
1003     -----------------------------------------------------------------------*/
1004     #define CFG_EEPROM_RESERVED                 (0x00FF)              // Protect first 256 bytes of memory
1005     #define CFG_EEPROM_CHIBI_IEEEADDR           (uint16_t)(0x0000)    // 8
1006     #define CFG_EEPROM_CHIBI_SHORTADDR          (uint16_t)(0x0009)    // 2
1007     #define CFG_EEPROM_UART_SPEED               (uint16_t)(0x0020)    // 4
1008     #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED   (uint16_t)(0x0030)    // 1
1009     #define CFG_EEPROM_TOUCHSCREEN_CAL_AN       (uint16_t)(0x0031)    // 4
1010     #define CFG_EEPROM_TOUCHSCREEN_CAL_BN       (uint16_t)(0x0035)    // 4
1011     #define CFG_EEPROM_TOUCHSCREEN_CAL_CN       (uint16_t)(0x0039)    // 4
1012     #define CFG_EEPROM_TOUCHSCREEN_CAL_DN       (uint16_t)(0x003D)    // 4
1013     #define CFG_EEPROM_TOUCHSCREEN_CAL_EN       (uint16_t)(0x0041)    // 4
1014     #define CFG_EEPROM_TOUCHSCREEN_CAL_FN       (uint16_t)(0x0045)    // 4
1015     #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER  (uint16_t)(0x0049)    // 4
1016     #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD   (uint16_t)(0x004D)    // 1
1017 /*=========================================================================*/
1018
1019
1020 /*=========================================================================
1021     LM75B TEMPERATURE SENSOR
1022     -----------------------------------------------------------------------
1023
1024     CFG_LM75B                 If defined, drivers for an optional LM75B
1025                               temperature sensor will be included during
1026                               build (requires external HW)
1027
1028     -----------------------------------------------------------------------*/
1029     // #define CFG_LM75B
1030 /*=========================================================================*/
1031
1032
1033 /*=========================================================================
1034     CHIBI WIRELESS STACK
1035     -----------------------------------------------------------------------
1036
1037     CFG_CHIBI                   If defined, the CHIBI wireless stack will be
1038                                 included during build.  Requires external HW.
1039     CFG_CHIBI_MODE              The mode to use when receiving and transmitting
1040                                 wireless data.  See chb_drvr.h for possible values
1041     CFG_CHIBI_POWER             The power level to use when transmitting.  See
1042                                 chb_drvr.h for possible values
1043     CFG_CHIBI_CHANNEL           802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
1044     CFG_CHIBI_PANID             16-bit PAN Identifier (ex.0x1234)
1045     CFG_CHIBI_PROMISCUOUS       Set to 1 to enabled promiscuous mode or
1046                                 0 to disable it.  If promiscuous mode is
1047                                 enabled be sure to set CFG_CHIBI_BUFFERSIZE
1048                                 to an appropriately large value (ex. 1024)
1049     CFG_CHIBI_BUFFERSIZE        The size of the message buffer in bytes
1050
1051     DEPENDENCIES:               Chibi requires the use of SSP0, 16-bit timer
1052                                 0 and pins 3.1, 3.2, 3.3.  It also requires
1053                                 the presence of CFG_I2CEEPROM.
1054
1055     NOTE:                       These settings are not relevant to all boards!
1056                                 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
1057                                 show how 'CHIBI' is meant to be connected
1058     -----------------------------------------------------------------------*/
1059     #ifdef CFG_BRD_LPC1343_REFDESIGN
1060       // #define CFG_CHIBI
1061       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1062       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1063       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1064       #define CFG_CHIBI_PANID             (0x1234)
1065       #define CFG_CHIBI_PROMISCUOUS       (0)
1066       #define CFG_CHIBI_BUFFERSIZE        (128)
1067     #endif
1068
1069     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1070       // #define CFG_CHIBI
1071       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1072       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1073       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1074       #define CFG_CHIBI_PANID             (0x1234)
1075       #define CFG_CHIBI_PROMISCUOUS       (0)
1076       #define CFG_CHIBI_BUFFERSIZE        (128)
1077     #endif
1078
1079     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1080       // #define CFG_CHIBI
1081       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1082       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1083       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1084       #define CFG_CHIBI_PANID             (0x1234)
1085       #define CFG_CHIBI_PROMISCUOUS       (0)
1086       #define CFG_CHIBI_BUFFERSIZE        (128)
1087     #endif
1088
1089     #ifdef CFG_BRD_LPC1343_802154USBSTICK
1090       #define CFG_CHIBI
1091       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1092       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1093       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1094       #define CFG_CHIBI_PANID             (0x1234)
1095       #define CFG_CHIBI_PROMISCUOUS       (0)
1096       #define CFG_CHIBI_BUFFERSIZE        (1024)
1097     #endif
1098
1099     #ifdef CFG_BRD_LPC1343_OLIMEX_P
1100       // #define CFG_CHIBI
1101       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1102       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1103       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1104       #define CFG_CHIBI_PANID             (0x1234)
1105       #define CFG_CHIBI_PROMISCUOUS       (0)
1106       #define CFG_CHIBI_BUFFERSIZE        (128)
1107     #endif
1108
1109     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
1110       // #define CFG_CHIBI
1111       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
1112       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
1113       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
1114       #define CFG_CHIBI_PANID             (0x1234)
1115       #define CFG_CHIBI_PROMISCUOUS       (0)
1116       #define CFG_CHIBI_BUFFERSIZE        (128)
1117     #endif
1118 /*=========================================================================*/
1119
1120
1121 /*=========================================================================
1122     TFT LCD
1123     -----------------------------------------------------------------------
1124
1125     CFG_TFTLCD                  If defined, this will cause drivers for
1126                                 a pre-determined LCD screen to be included
1127                                 during build.  Only one LCD driver can be
1128                                 included during the build process (for ex.
1129                                 'drivers/displays/hw/ILI9325.c')
1130     CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
1131                                 included for 3x6, 5x8, 7x8 and 8x8 fonts.
1132                                 This should only be enabled if these small
1133                                 fonts are required since there is already
1134                                 support for larger fonts generated with
1135                                 Dot Factory
1136                                 http://www.pavius.net/downloads/tools/53-the-dot-factory
1137     CFG_TFTLCD_USEAAFONTS       If set to a non-zero value, anti-aliased
1138                                 fonts will be used instead of regular 1-bit
1139                                 font.  These result in much higher-
1140                                 quality text, but the fonts are 2 or 4
1141                                 times larger than plain bitmap fonts and
1142                                 take a bit more rendering time to display.
1143     CFG_TFTLCD_TS_DEFAULTTHRESHOLD  Default minimum threshold to trigger a
1144                                 touch event with the touch screen (and exit
1145                                 from 'tsWaitForEvent' in touchscreen.c).
1146                                 Should be an 8-bit value somewhere between
1147                                 8 and 75 in normal circumstances.  This is
1148                                 the default value and may be overriden by
1149                                 a value stored in EEPROM.
1150     CFG_TFTLCD_TS_KEYPADDELAY   The delay in milliseconds between key
1151                                 presses in dialogue boxes
1152
1153     PIN LAYOUT:                 The pin layout that is used by this driver
1154                                 can be seen in the following schematic:
1155                                 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
1156
1157     DEPENDENCIES:               TFTLCD requires the use of pins 1.8, 1.9,
1158                                 1.10, 1.11, 3.3 and 2.1-9.
1159     -----------------------------------------------------------------------*/
1160     #ifdef CFG_BRD_LPC1343_REFDESIGN
1161       // #define CFG_TFTLCD
1162       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1163       #define CFG_TFTLCD_USEAAFONTS          (1)
1164       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1165       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1166     #endif
1167
1168     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1169       // #define CFG_TFTLCD
1170       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1171       #define CFG_TFTLCD_USEAAFONTS          (0)
1172       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1173       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1174     #endif
1175
1176     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1177       #define CFG_TFTLCD
1178       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1179       #define CFG_TFTLCD_USEAAFONTS          (1)
1180       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1181       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1182     #endif
1183
1184     #ifdef CFG_BRD_LPC1343_802154USBSTICK
1185       // #define CFG_TFTLCD
1186       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1187       #define CFG_TFTLCD_USEAAFONTS          (0)
1188       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1189       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1190     #endif
1191
1192     #ifdef CFG_BRD_LPC1343_OLIMEX_P
1193       // #define CFG_TFTLCD
1194       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1195       #define CFG_TFTLCD_USEAAFONTS          (0)
1196       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1197       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1198     #endif
1199
1200     #ifdef CFG_BRD_LPC1343_LPCXPRESSO
1201       // #define CFG_TFTLCD
1202       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
1203       #define CFG_TFTLCD_USEAAFONTS          (0)
1204       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1205       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
1206     #endif
1207 /*=========================================================================*/
1208
1209
1210 /*=========================================================================
1211     Monochrome/Bitmap Graphic LCDs
1212     -----------------------------------------------------------------------
1213
1214     CFG_ST7565                If defined, this will cause drivers for
1215                               the 128x64 pixel ST7565 LCD to be included
1216     CFG_SSD1306               If defined, this will cause drivers for
1217                               the 128x64 pixel SSD1306 OLED display to be
1218                               included (using bit-banged SPI)
1219     CFG_SHARPMEM              If defined, this will cause drivers for
1220                               Sharp Memory Displays to be included
1221
1222     DEPENDENCIES:             ST7565 requires the use of pins 2.1-6.
1223     DEPENDENCIES:             SSD1306 requires the use of pins 2.1-6.
1224     DEPENDENCIES:             SSD1306_I2C requires the use of pins 2.2.
1225     DEPENDENCIES:             SHARPMEM requires the use of pins 2.1-4.
1226     -----------------------------------------------------------------------*/
1227     // #define CFG_ST7565
1228     // #define CFG_SSD1306
1229     // #define CFG_SHARPMEM
1230 /*=========================================================================*/
1231
1232
1233 /*=========================================================================
1234     RSA Encryption
1235     -----------------------------------------------------------------------
1236
1237     CFG_RSA                     If defined, support for basic RSA
1238                                 encryption will be included.
1239     CFG_RSA_BITS                Indicates the number of bits used for
1240                                 RSA encryption keys.  To keep code size
1241                                 reasonable, RSA encryption is currently
1242                                 limited to using 64-bit or 32-bit numbers,
1243                                 with 64-bit providing higher security, and
1244                                 32-bit providing smaller encrypted text
1245                                 size.
1246
1247     NOTE:                       Please note that Printf can not be
1248                                 used to display 64-bit values (%lld)!
1249     -----------------------------------------------------------------------*/
1250     // #define CFG_RSA
1251     #define CFG_RSA_BITS                  (32)
1252 /*=========================================================================*/
1253
1254
1255
1256
1257 /*=========================================================================
1258   CONFIG FILE VALIDATION
1259   -------------------------------------------------------------------------
1260   Basic error checking to make sure that incompatible defines are not
1261   enabled at the same time, etc.
1262
1263   =========================================================================*/
1264
1265 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1266   !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1267   !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1268   !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1269   !defined CFG_BRD_LPC1343_802154USBSTICK && \
1270   !defined CFG_BRD_LPC1343_OLIMEX_P && \
1271   !defined CFG_BRD_LPC1343_LPCXPRESSO
1272   #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK or CFG_BRD_LPC1343_LPCXPRESSO)"
1273 #endif
1274
1275 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1276   #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1277 #endif
1278
1279 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1280   #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1281 #endif
1282
1283 #if defined CFG_USBCDC && defined CFG_USBHID
1284   #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1285 #endif
1286
1287 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1288   #error "Only one SCK pin can be defined at a time for SSP0"
1289 #endif
1290
1291 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1292   #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1293 #endif
1294
1295 #ifdef CFG_INTERFACE
1296   #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1297     #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1298   #endif
1299   #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1300     #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1301   #endif
1302 #endif
1303
1304 #ifdef CFG_CHIBI
1305   #if !defined CFG_I2CEEPROM
1306     #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1307   #endif
1308   #ifdef CFG_SDCARD
1309     #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1310   #endif
1311   #ifdef CFG_TFTLCD
1312     #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1313   #endif
1314   #ifdef CFG_PWM
1315     #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1316   #endif
1317   #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1318     #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1319   #endif
1320   #if !defined GPIO_ENABLE_IRQ1
1321     #error "GPIO_ENABLE_IRQ1 must be enabled when using Chibi (Chibi IRQ is on GPIO1.8)"
1322   #endif
1323 #endif
1324
1325 #ifdef CFG_TFTLCD
1326   #ifdef CFG_ST7565
1327     #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1328   #endif
1329   #ifdef CFG_SSD1306
1330     #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1331   #endif
1332   #ifdef CFG_SHARPMEM
1333     #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1334   #endif
1335   #ifdef CFG_PWM
1336     #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1337   #endif
1338   #if !defined CFG_I2CEEPROM
1339     #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1340   #endif
1341 #endif
1342
1343 #ifdef CFG_SDCARD
1344   #ifdef CFG_STEPPER
1345     #error  "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1346   #endif
1347 #endif
1348
1349 #ifdef CFG_ST7565
1350   #ifdef CFG_SSD1306
1351     #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1352   #endif
1353 #endif
1354
1355 #ifdef CFG_RSA
1356   #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1357     #error "CFG_RSA_BITS must be equal to either 32 or 64."
1358   #endif
1359 #endif
1360
1361 #if ADC_AVERAGING_ENABLE && ADC_AVERAGING_SAMPLES < 1
1362   #error "ADC_AVERAGING_SAMPLES must be 1 or higher when ADC averaging is enabled"
1363 #endif
1364
1365 #endif