projectconfig.h

   1 /**************************************************************************/
   2 /*!
   3     @file     projectconfig.h
   4     @author   K. Townsend (microBuilder.eu)
   5
   6     @section LICENSE
   7
   8     Software License Agreement (BSD License)
   9
  10     Copyright (c) 2010, microBuilder SARL
  11     All rights reserved.
  12
  13     Redistribution and use in source and binary forms, with or without
  14     modification, are permitted provided that the following conditions are met:
  15     1. Redistributions of source code must retain the above copyright
  16     notice, this list of conditions and the following disclaimer.
  17     2. Redistributions in binary form must reproduce the above copyright
  18     notice, this list of conditions and the following disclaimer in the
  19     documentation and/or other materials provided with the distribution.
  20     3. Neither the name of the copyright holders nor the
  21     names of its contributors may be used to endorse or promote products
  22     derived from this software without specific prior written permission.
  23
  24     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  25     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  26     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  28     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  29     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  31     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  32     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34 */
  35 /**************************************************************************/
  36
  37 #ifndef _PROJECTCONFIG_H_
  38 #define _PROJECTCONFIG_H_
  39
  40 #include "lpc134x.h"
  41 #include "sysdefs.h"
  42
  43 /*=========================================================================
  44     BOARD SELECTION
  45
  46     Because several boards use this code library with sometimes slightly
  47     different pin configuration, you will need to specify which board you
  48     are using by enabling one of the following definitions. The code base
  49     will then try to configure itself accordingly for that board.
  50
  51     CFG_BRD_LPC1343_REFDESIGN
  52     =========================
  53
  54         microBuilder.eu LPC1343 Reference Design base board with
  55         on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
  56
  57                 This is the recommended starting point for new development
  58                 since it makes it easy to send printf output to USB CDC, access
  59                 the on-board EEPROM, etc.
  60
  61     CFG_BRD_LPC1343_REFDESIGN_MINIMAL
  62     =================================
  63
  64         microBuilder.eu LPC1343 Reference Design base board with
  65         only the most common peripherals initialised by default.
  66
  67         Results in smallest code since EEPROM, USB, etc., are not
  68         initialised on startup.  By default, only the following
  69         peripherals are initialised by systemInit():
  70
  71               - CPU (Configures the PLL, etc.)
  72               - GPIO
  73               - SysTick Timer
  74               - UART (with printf support) *
  75
  76         * Can be removed to save 0.8kb in debug and 0.3 kb in
  77         release. Comment out 'CFG_PRINTF_UART' to disable it.
  78
  79         The code size can be further reduced by several KB by removing
  80         any IRQ Handlers that are not used.  The I2C IRQHandler, for
  81         example, uses ~1KB of flash in debug and ~400KB in release mode,
  82         but because it is referenced in the startup code it is always
  83         included even if I2C is never used in the project.
  84
  85         Other IRQ Handlers that you might be able to comment out
  86         to save some space are:
  87
  88         IRQ Handler               Debug   Release
  89         ------------------------- ------  -------
  90         I2C_IRQHandler            1160 b    400 b
  91         SSP_IRQHandler             160 b     76 b
  92         UART_IRQHandler            246 b    116 b
  93         WAKEUP_IRQHandler          160 b    100 b
  94         WDT_IRQHandler              50 b     28 b
  95
  96     CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
  97     ====================================
  98
  99         microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
 100         for the CLI interface.
 101
 102     CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 103     =====================================
 104
 105         microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
 106         for the CLI interface.
 107
 108     CFG_BRD_LPC1343_802154USBSTICK
 109     ==============================
 110
 111         microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
 112
 113     -----------------------------------------------------------------------*/
 114     #define CFG_BRD_LPC1343_REFDESIGN
 115     // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 116     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 117     // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 118     // #define CFG_BRD_LPC1343_802154USBSTICK
 119 /*=========================================================================*/
 120
 121
 122 /**************************************************************************
 123     PIN USAGE
 124     -----------------------------------------------------------------------
 125     This table tries to give an indication of which GPIO pins and
 126     peripherals are used by the available drivers and SW examples.  Only
 127     dedicated GPIO pins available on the LPC1343 Reference Board are shown
 128     below.  Any unused peripheral blocks like I2C, SSP, ADC, etc., can
 129     also be used as GPIO if they are available.
 130
 131                 PORT 1        PORT 2                PORT 3
 132                 =========     =================     =======
 133                 8 9 10 11     1 2 3 4 5 6 7 8 9     0 1 2 3
 134
 135     SDCARD      . .  .  .     . . . . . . . . .     X . . .
 136     PWM         . X  .  .     . . . . . . . . .     . . . .
 137     STEPPER     . .  .  .     . . . . . . . . .     X X X X
 138     CHIBI       X X  X  .     . . . . . . . . .     . . . .
 139     ILI9325/8   X X  X  X     X X X X X X X X X     . . . X
 140     ST7565      X X  X  X     X X X X X X X X X     . . . X
 141     ST7735      . .  .  .     X X X X X X . . .     . . . .
 142     SHARPMEM    . .  .  .     X X X X . . . . .     . . . .
 143     SSD1306     . .  .  .     X X X . X X . . .     . . . .
 144     MCP121      . .  .  .     . . . . . . . . .     . X . .
 145
 146                 TIMERS                    SSP     ADC         UART
 147                 ======================    ===     =======     ====
 148                 16B0  16B1  32B0  32B1    0       0 1 2 3     0
 149
 150     SDCARD      .     .     .     .       X       . . . .     .
 151     PWM         .     X     .     .       .       . . . .     .
 152     PMU [1]     .     .     X     .       .       . . . .     .
 153     USB         .     .     .     X       .       . . . .     .
 154     STEPPER     .     .     X     .       .       . . . .     .
 155     CHIBI       x     .     .     .       X       . . . .     .
 156     ILI9325/8   .     .     .     .       .       X X X X     .
 157     ST7565      .     .     .     .       .       X X X X     .
 158     ST7535      .     .     .     .       .       . . . .     .
 159     SHARPMEM    .     .     .     .       .       . . . .     .
 160     SSD1306     .     .     .     .       .       . . . .     .
 161     INTERFACE   .     .     .     .       .       . . . .     X[2]
 162
 163     [1]  PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep.  This timer
 164          can safely be used by other peripherals, but may need to be
 165          reconfigured when you wakeup from deep-sleep.
 166     [2]  INTERFACE can be configured to use either USBCDC or UART
 167
 168  **************************************************************************/
 169
 170
 171 /**************************************************************************
 172     I2C Addresses
 173     -----------------------------------------------------------------------
 174     The following addresses are used by the different I2C sensors included
 175     in the code base [1]
 176
 177                                 HEX       BINARY
 178                                 ====      ========
 179     ISL12022M (RTC)             0xDE      1101111x
 180     ISL12022M (SRAM)            0xAE      1010111x
 181     LM75B                       0x90      1001000x
 182     MCP24AA                     0xA0      1010000x
 183     MCP4725                     0xC0      1100000x
 184     TSL2561                     0x72      0111001x
 185     TCS3414                     0x72      0111001x
 186
 187     [1]  Alternative addresses may exists, but the addresses listed in this
 188          table are the values used in the code base
 189
 190  **************************************************************************/
 191
 192
 193 /*=========================================================================
 194     FIRMWARE VERSION SETTINGS
 195     -----------------------------------------------------------------------*/
 196     #define CFG_FIRMWARE_VERSION_MAJOR            (0)
 197     #define CFG_FIRMWARE_VERSION_MINOR            (9)
 198     #define CFG_FIRMWARE_VERSION_REVISION         (8)
 199 /*=========================================================================*/
 200
 201
 202 /*=========================================================================
 203     CORE CPU SETTINGS
 204     -----------------------------------------------------------------------
 205
 206     CFG_CPU_CCLK    Value is for reference only.  'core/cpu/cpu.c' must
 207                     be modified to change the clock speed, but the value
 208                     should be indicated here since CFG_CPU_CCLK is used by
 209                     other peripherals to determine timing.
 210
 211     -----------------------------------------------------------------------*/
 212     #define CFG_CPU_CCLK                (72000000)  // 1 tick = 13.88nS
 213 /*=========================================================================*/
 214
 215
 216 /*=========================================================================
 217     SYSTICK TIMER
 218     -----------------------------------------------------------------------
 219
 220     CFG_SYSTICK_DELAY_IN_MS   The number of milliseconds between each tick
 221                               of the systick timer.
 222
 223     -----------------------------------------------------------------------*/
 224     #define CFG_SYSTICK_DELAY_IN_MS     (1)
 225 /*=========================================================================*/
 226
 227
 228 /*=========================================================================
 229     ALTERNATE RESET PIN
 230     -----------------------------------------------------------------------
 231
 232     CFG_ALTRESET        If defined, indicates that a GPIO pin should be
 233                         configured as an alternate reset pin in addition
 234                         to the dedicated reset pin.
 235     CFG_ALTRESET_PORT   The GPIO port where the alt reset pin is located
 236     CFG_ALTRESET_PIN    The GPIO pin where the alt reset pin is located
 237
 238     -----------------------------------------------------------------------*/
 239     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 240       #define CFG_ALTRESET
 241       #define CFG_ALTRESET_PORT         (1)
 242       #define CFG_ALTRESET_PIN          (5)   // P1.5 = RTS
 243     #endif
 244 /*=========================================================================*/
 245
 246
 247 /*=========================================================================
 248     UART
 249     -----------------------------------------------------------------------
 250
 251     CFG_UART_BAUDRATE         The default UART speed.  This value is used
 252                               when initialising UART, and should be a
 253                               standard value like 57600, 9600, etc.
 254                               NOTE: This value may be overridden if
 255                               another value is stored in EEPROM!
 256     CFG_UART_BUFSIZE          The length in bytes of the UART RX FIFO. This
 257                               will determine the maximum number of received
 258                               characters to store in memory.
 259
 260     -----------------------------------------------------------------------*/
 261     #ifdef CFG_BRD_LPC1343_REFDESIGN
 262       #define CFG_UART_BAUDRATE           (115200)
 263       #define CFG_UART_BUFSIZE            (512)
 264     #endif
 265
 266     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 267       #define CFG_UART_BAUDRATE           (115200)
 268       #define CFG_UART_BUFSIZE            (512)
 269     #endif
 270
 271     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 272       #define CFG_UART_BAUDRATE           (115200)
 273       #define CFG_UART_BUFSIZE            (512)
 274     #endif
 275
 276     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 277       #define CFG_UART_BAUDRATE           (57600)
 278       #define CFG_UART_BUFSIZE            (512)
 279     #endif
 280
 281     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 282       #define CFG_UART_BAUDRATE           (115200)
 283       #define CFG_UART_BUFSIZE            (512)
 284     #endif
 285 /*=========================================================================*/
 286
 287
 288 /*=========================================================================
 289     SSP
 290     -----------------------------------------------------------------------
 291
 292     CFG_SSP0_SCKPIN_2_11      Indicates which pin should be used for SCK0
 293     CFG_SSP0_SCKPIN_0_6
 294
 295     -----------------------------------------------------------------------*/
 296     #ifdef CFG_BRD_LPC1343_REFDESIGN
 297       #define CFG_SSP0_SCKPIN_2_11
 298       // #define CFG_SSP0_SCKPIN_0_6
 299     #endif
 300
 301     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 302       #define CFG_SSP0_SCKPIN_2_11
 303       // #define CFG_SSP0_SCKPIN_0_6
 304     #endif
 305
 306     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 307       #define CFG_SSP0_SCKPIN_2_11
 308       // #define CFG_SSP0_SCKPIN_0_6
 309     #endif
 310
 311     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 312       // #define CFG_SSP0_SCKPIN_2_11
 313       #define CFG_SSP0_SCKPIN_0_6
 314     #endif
 315 /*=========================================================================*/
 316
 317
 318 /*=========================================================================
 319     ON-BOARD LED
 320     -----------------------------------------------------------------------
 321
 322     CFG_LED_PORT              The port for the on board LED
 323     CFG_LED_PIN               The pin for the on board LED
 324     CFG_LED_ON                The pin state to turn the LED on (0 = low, 1 = high)
 325     CFG_LED_OFF               The pin state to turn the LED off (0 = low, 1 = high)
 326
 327     -----------------------------------------------------------------------*/
 328     #ifdef CFG_BRD_LPC1343_REFDESIGN
 329       #define CFG_LED_PORT                (2)
 330       #define CFG_LED_PIN                 (10)
 331       #define CFG_LED_ON                  (0)
 332       #define CFG_LED_OFF                 (1)
 333     #endif
 334
 335     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 336       #define CFG_LED_PORT                (2)
 337       #define CFG_LED_PIN                 (10)
 338       #define CFG_LED_ON                  (0)
 339       #define CFG_LED_OFF                 (1)
 340     #endif
 341
 342     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 343       #define CFG_LED_PORT                (2)
 344       #define CFG_LED_PIN                 (10)
 345       #define CFG_LED_ON                  (0)
 346       #define CFG_LED_OFF                 (1)
 347     #endif
 348
 349     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 350       #define CFG_LED_PORT                (3)
 351       #define CFG_LED_PIN                 (2)
 352       #define CFG_LED_ON                  (0)
 353       #define CFG_LED_OFF                 (1)
 354     #endif
 355 /*=========================================================================*/
 356
 357
 358 /*=========================================================================
 359     MICRO-SD CARD
 360     -----------------------------------------------------------------------
 361
 362     CFG_SDCARD                If this field is defined SD Card and FAT32
 363                               file system support will be included
 364     CFG_SDCARD_READONLY       If this is set to 1, all commands to
 365                               write to the SD card will be removed
 366                               saving some flash space.
 367     CFG_SDCARD_CDPORT         The card detect port number
 368     CFG_SDCARD_CDPIN          The card detect pin number
 369
 370     NOTE:                     All config settings for FAT32 are defined
 371                               in ffconf.h
 372
 373     BENCHMARK:                With SPI set to 6.0MHz, FATFS can read
 374                               ~300KB/s (w/512 byte read buffer)
 375
 376     PIN LAYOUT:               The pin layout that is used by this driver
 377                               can be seen in the following schematic:
 378                               /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 379
 380     DEPENDENCIES:             SDCARD requires the use of SSP0.
 381     -----------------------------------------------------------------------*/
 382     #ifdef CFG_BRD_LPC1343_REFDESIGN
 383       // #define CFG_SDCARD
 384       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 385       #define CFG_SDCARD_CDPORT           (3)
 386       #define CFG_SDCARD_CDPIN            (0)
 387     #endif
 388
 389     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 390       // #define CFG_SDCARD
 391       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 392       #define CFG_SDCARD_CDPORT           (3)
 393       #define CFG_SDCARD_CDPIN            (0)
 394     #endif
 395
 396     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 397       #define CFG_SDCARD
 398       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 399       #define CFG_SDCARD_CDPORT           (3)
 400       #define CFG_SDCARD_CDPIN            (0)
 401     #endif
 402
 403     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 404       // #define CFG_SDCARD
 405       #define CFG_SDCARD_READONLY         (1)   // Must be 0 or 1
 406       #define CFG_SDCARD_CDPORT           (3)
 407       #define CFG_SDCARD_CDPIN            (0)
 408     #endif
 409 /*=========================================================================*/
 410
 411
 412 /*=========================================================================
 413     USB
 414     -----------------------------------------------------------------------
 415
 416     CFG_USBHID                If this field is defined USB HID support will
 417                               be included.  Currently uses ROM-based USB HID
 418     CFG_USBCDC                If this field is defined USB CDC support will
 419                               be included, with the USB Serial Port speed
 420                               set to 115200 BPS by default
 421     CFG_USBCDC_BAUDRATE       The default TX/RX speed.  This value is used
 422                               when initialising USBCDC, and should be a
 423                               standard value like 57600, 9600, etc.
 424     CFG_USBCDC_INITTIMEOUT    The maximum delay in milliseconds to wait for
 425                               USB to connect.  Must be a multiple of 10!
 426     CFG_USBCDC_BUFFERSIZE     Size of the buffer (in bytes) that stores
 427                               printf data until it can be sent out in
 428                               64 byte frames.  The buffer is required since
 429                               only one frame per ms can be sent using USB
 430                               CDC (see 'puts' in systeminit.c).
 431
 432     -----------------------------------------------------------------------*/
 433     #define CFG_USB_VID                   (0x239A)
 434     #define CFG_USB_PID                   (0x1002)
 435
 436     #ifdef CFG_BRD_LPC1343_REFDESIGN
 437       // #define CFG_USBHID
 438       #define CFG_USBCDC
 439       #define CFG_USBCDC_BAUDRATE         (115200)
 440       #define CFG_USBCDC_INITTIMEOUT      (5000)
 441       #define CFG_USBCDC_BUFFERSIZE       (256)
 442     #endif
 443
 444     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 445       // #define CFG_USBHID
 446       // #define CFG_USBCDC
 447       #define CFG_USBCDC_BAUDRATE         (115200)
 448       #define CFG_USBCDC_INITTIMEOUT      (5000)
 449       #define CFG_USBCDC_BUFFERSIZE       (256)
 450     #endif
 451
 452     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 453       // #define CFG_USBHID
 454       #define CFG_USBCDC
 455       #define CFG_USBCDC_BAUDRATE         (115200)
 456       #define CFG_USBCDC_INITTIMEOUT      (5000)
 457       #define CFG_USBCDC_BUFFERSIZE       (256)
 458     #endif
 459
 460     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 461       // #define CFG_USBHID
 462       // #define CFG_USBCDC
 463       #define CFG_USBCDC_BAUDRATE         (57600)
 464       #define CFG_USBCDC_INITTIMEOUT      (5000)
 465       #define CFG_USBCDC_BUFFERSIZE       (256)
 466     #endif
 467
 468     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 469       // #define CFG_USBHID
 470       #define CFG_USBCDC
 471       #define CFG_USBCDC_BAUDRATE         (115200)
 472       #define CFG_USBCDC_INITTIMEOUT      (5000)
 473       #define CFG_USBCDC_BUFFERSIZE       (256)
 474     #endif
 475 /*=========================================================================*/
 476
 477
 478 /*=========================================================================
 479     PRINTF REDIRECTION
 480     -----------------------------------------------------------------------
 481
 482     CFG_PRINTF_UART           Will cause all printf statements to be
 483                               redirected to UART
 484     CFG_PRINTF_USBCDC         Will cause all printf statements to be
 485                               redirect to USB Serial
 486     CFG_PRINTF_NEWLINE        This is typically "\r\n" for Windows or
 487                               "\n" for *nix
 488
 489     Note: If no printf redirection definitions are present, all printf
 490     output will be ignored.
 491     -----------------------------------------------------------------------*/
 492     #ifdef CFG_BRD_LPC1343_REFDESIGN
 493       // #define CFG_PRINTF_UART
 494       #define CFG_PRINTF_USBCDC
 495       #define CFG_PRINTF_NEWLINE          "\r\n"
 496     #endif
 497
 498     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 499       #define CFG_PRINTF_UART
 500       // #define CFG_PRINTF_USBCDC
 501       #define CFG_PRINTF_NEWLINE          "\r\n"
 502     #endif
 503
 504     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 505       // #define CFG_PRINTF_UART
 506       #define CFG_PRINTF_USBCDC
 507       #define CFG_PRINTF_NEWLINE          "\r\n"
 508     #endif
 509
 510     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 511       #define CFG_PRINTF_UART
 512       // #define CFG_PRINTF_USBCDC
 513       #define CFG_PRINTF_NEWLINE          "\n"
 514     #endif
 515
 516     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 517       // #define CFG_PRINTF_UART
 518       #define CFG_PRINTF_USBCDC
 519       #define CFG_PRINTF_NEWLINE          "\r\n"
 520     #endif
 521 /*=========================================================================*/
 522
 523
 524 /*=========================================================================
 525     COMMAND LINE INTERFACE
 526     -----------------------------------------------------------------------
 527
 528     CFG_INTERFACE             If this field is defined the UART or USBCDC
 529                               based command-line interface will be included
 530     CFG_INTERFACE_MAXMSGSIZE  The maximum number of bytes to accept for an
 531                               incoming command
 532     CFG_INTERFACE_PROMPT      The command prompt to display at the start
 533                               of every new data entry line
 534     CFG_INTERFACE_SILENTMODE  If this is set to 1 only text generated in
 535                               response to commands will be send to the
 536                               output buffer.  The command prompt will not
 537                               be displayed and incoming text will not be
 538                               echoed back to the output buffer (allowing
 539                               you to see the text you have input).  This
 540                               is normally only desirable in a situation
 541                               where another MCU is communicating with
 542                               the LPC1343.
 543     CFG_INTERFACE_DROPCR      If this is set to 1 all incoming \r
 544                               characters will be dropped
 545     CFG_INTERFACE_ENABLEIRQ   If this is set to 1 the IRQ pin will be
 546                               set high when a command starts executing
 547                               and will go low when the command has
 548                               finished executing or the LCD is not busy.
 549                               This allows another device to know when a
 550                               new command can safely be sent.
 551     CFG_INTERFACE_IRQPORT     The gpio port for the IRQ/busy pin
 552     CFG_INTERFACE_IRQPIN      The gpio pin number for the IRQ/busy pin
 553     CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
 554                               error messages will be returned (followed
 555                               by CFG_PRINTF_NEWLINE), rather than more
 556                               verbose error messages.  The specific
 557                               characters used are defined below.
 558     CFG_INTERFACE_CONFIRMREADY  If this is set to 1 a text confirmation
 559                               will be sent when the command prompt is
 560                               ready for a new command.  This is in
 561                               addition to CFG_INTERFACE_ENABLEIRQ if
 562                               this is also enabled.  The character used
 563                               is defined below.
 564
 565     NOTE:                     The command-line interface will use either
 566                               USB-CDC or UART depending on whether
 567                               CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
 568                               selected.
 569     -----------------------------------------------------------------------*/
 570     #ifdef CFG_BRD_LPC1343_REFDESIGN
 571       #define CFG_INTERFACE
 572       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 573       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 574       #define CFG_INTERFACE_SILENTMODE    (0)
 575       #define CFG_INTERFACE_DROPCR        (0)
 576       #define CFG_INTERFACE_ENABLEIRQ     (0)
 577       #define CFG_INTERFACE_IRQPORT       (0)
 578       #define CFG_INTERFACE_IRQPIN        (7)
 579       #define CFG_INTERFACE_SHORTERRORS   (0)
 580       #define CFG_INTERFACE_CONFIRMREADY  (0)
 581     #endif
 582
 583     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 584       // #define CFG_INTERFACE
 585       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 586       #define CFG_INTERFACE_PROMPT        "LPC1343 >> "
 587       #define CFG_INTERFACE_SILENTMODE    (0)
 588       #define CFG_INTERFACE_DROPCR        (0)
 589       #define CFG_INTERFACE_ENABLEIRQ     (0)
 590       #define CFG_INTERFACE_IRQPORT       (0)
 591       #define CFG_INTERFACE_IRQPIN        (7)
 592       #define CFG_INTERFACE_SHORTERRORS   (0)
 593       #define CFG_INTERFACE_CONFIRMREADY  (0)
 594     #endif
 595
 596     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
 597       #define CFG_INTERFACE
 598       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 599       #define CFG_INTERFACE_PROMPT        "CMD >> "
 600       #define CFG_INTERFACE_SILENTMODE    (0)
 601       #define CFG_INTERFACE_DROPCR        (0)
 602       #define CFG_INTERFACE_ENABLEIRQ     (0)
 603       #define CFG_INTERFACE_IRQPORT       (0)
 604       #define CFG_INTERFACE_IRQPIN        (7)
 605       #define CFG_INTERFACE_SHORTERRORS   (0)
 606       #define CFG_INTERFACE_CONFIRMREADY  (0)
 607       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 608       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 609       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 610       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 611     #endif
 612
 613     #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 614       #define CFG_INTERFACE
 615       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 616       #define CFG_INTERFACE_PROMPT        ">>"
 617       #define CFG_INTERFACE_SILENTMODE    (1)
 618       #define CFG_INTERFACE_DROPCR        (1)
 619       #define CFG_INTERFACE_ENABLEIRQ     (1)
 620       #define CFG_INTERFACE_IRQPORT       (0)
 621       #define CFG_INTERFACE_IRQPIN        (7)
 622       #define CFG_INTERFACE_SHORTERRORS   (1)
 623       #define CFG_INTERFACE_CONFIRMREADY  (0)
 624       #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND    "?"
 625       #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS       ">"
 626       #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS        "<"
 627       #define CFG_INTERFACE_CONFIRMREADY_TEXT             "."
 628     #endif
 629
 630     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 631       // #define CFG_INTERFACE
 632       #define CFG_INTERFACE_MAXMSGSIZE    (256)
 633       #define CFG_INTERFACE_PROMPT        "CMD >> "
 634       #define CFG_INTERFACE_SILENTMODE    (0)
 635       #define CFG_INTERFACE_DROPCR        (0)
 636       #define CFG_INTERFACE_ENABLEIRQ     (0)
 637       #define CFG_INTERFACE_IRQPORT       (0)
 638       #define CFG_INTERFACE_IRQPIN        (7)
 639       #define CFG_INTERFACE_SHORTERRORS   (0)
 640       #define CFG_INTERFACE_CONFIRMREADY  (0)
 641     #endif
 642 /*=========================================================================*/
 643
 644
 645 /*=========================================================================
 646     PWM SETTINGS
 647     -----------------------------------------------------------------------
 648
 649     CFG_PWM                     If this is defined, a basic PWM driver
 650                                 will be included using 16-bit Timer 1 and
 651                                 Pin 1.9 (MAT0) for the PWM output.  In
 652                                 order to allow for a fixed number of
 653                                 pulses to be generated, some PWM-specific
 654                                 code is required in the 16-Bit Timer 1
 655                                 ISR.  See "core/timer16/timer16.c" for
 656                                 more information.
 657     CFG_PWM_DEFAULT_PULSEWIDTH  The default pulse width in ticks
 658     CFG_PWM_DEFAULT_DUTYCYCLE   The default duty cycle in percent
 659
 660     DEPENDENCIES:               PWM output requires the use of 16-bit
 661                                 timer 1 and pin 1.9 (CT16B1_MAT0).
 662     -----------------------------------------------------------------------*/
 663     // #define CFG_PWM
 664     #define CFG_PWM_DEFAULT_PULSEWIDTH  (CFG_CPU_CCLK / 1000)
 665     #define CFG_PWM_DEFAULT_DUTYCYCLE   (50)
 666 /*=========================================================================*/
 667
 668
 669 /*=========================================================================
 670     STEPPER MOTOR SETTINGS
 671     -----------------------------------------------------------------------
 672
 673     CFG_STEPPER                 If this is defined, a simple bi-polar
 674                                 stepper motor will be included for common
 675                                 H-bridge chips like the L293D or SN754410N
 676
 677     DEPENDENCIES:               STEPPER requires the use of pins 3.0-3 and
 678                                 32-bit Timer 0.
 679     -----------------------------------------------------------------------*/
 680     // #define CFG_STEPPER
 681 /*=========================================================================*/
 682
 683
 684 /*=========================================================================
 685     EEPROM
 686     -----------------------------------------------------------------------
 687
 688     CFG_I2CEEPROM             If defined, drivers for the onboard EEPROM
 689                               will be included during build
 690     CFG_I2CEEPROM_SIZE        The number of bytes available on the EEPROM
 691
 692     -----------------------------------------------------------------------*/
 693     #ifdef CFG_BRD_LPC1343_REFDESIGN
 694       #define CFG_I2CEEPROM
 695       #define CFG_I2CEEPROM_SIZE          (3072)
 696     #endif
 697
 698     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 699       // #define CFG_I2CEEPROM
 700       #define CFG_I2CEEPROM_SIZE          (3072)
 701     #endif
 702
 703     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 704       #define CFG_I2CEEPROM
 705       #define CFG_I2CEEPROM_SIZE          (3072)
 706     #endif
 707
 708     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 709       #define CFG_I2CEEPROM
 710       #define CFG_I2CEEPROM_SIZE          (3072)
 711     #endif
 712 /*=========================================================================*/
 713
 714
 715 /*=========================================================================
 716     EEPROM MEMORY MAP
 717     -----------------------------------------------------------------------
 718     EEPROM is used to persist certain user modifiable values to make
 719     sure that these changes remain in effect after a reset or hard
 720     power-down.  The addresses in EEPROM for these various system
 721     settings/values are defined below.  The first 256 bytes of EEPROM
 722     are reserved for this (0x0000..0x00FF).
 723
 724     CFG_EEPROM_RESERVED       The last byte of reserved EEPROM memory
 725
 726           EEPROM Address (0x0000..0x00FF)
 727           ===============================
 728           0 1 2 3 4 5 6 7 8 9 A B C D E F
 729     000x  x x x x x x x x . x x . . . . .   Chibi
 730     001x  . . . . . . . . . . . . . . . .
 731     002x  x x x x . . . . . . . . . . . .   UART
 732     003x  x x x x x x x x x x x x x x x x   Touch Screen Calibration
 733     004x  x x x x x x x x x x x x x x . .   Touch Screen Calibration
 734     005x  . . . . . . . . . . . . . . . .
 735     006x  . . . . . . . . . . . . . . . .
 736     007x  . . . . . . . . . . . . . . . .
 737     008x  . . . . . . . . . . . . . . . .
 738     009x  . . . . . . . . . . . . . . . .
 739     00Ax  . . . . . . . . . . . . . . . .
 740     00Bx  . . . . . . . . . . . . . . . .
 741     00Cx  . . . . . . . . . . . . . . . .
 742     00Dx  . . . . . . . . . . . . . . . .
 743     00Ex  . . . . . . . . . . . . . . . .
 744     00Fx  . . . . . . . . . . . . . . . .
 745
 746     -----------------------------------------------------------------------*/
 747     #define CFG_EEPROM_RESERVED                 (0x00FF)              // Protect first 256 bytes of memory
 748     #define CFG_EEPROM_CHIBI_IEEEADDR           (uint16_t)(0x0000)    // 8
 749     #define CFG_EEPROM_CHIBI_SHORTADDR          (uint16_t)(0x0009)    // 2
 750     #define CFG_EEPROM_UART_SPEED               (uint16_t)(0x0020)    // 4
 751     #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED   (uint16_t)(0x0030)    // 1
 752     #define CFG_EEPROM_TOUCHSCREEN_CAL_AN       (uint16_t)(0x0031)    // 4
 753     #define CFG_EEPROM_TOUCHSCREEN_CAL_BN       (uint16_t)(0x0035)    // 4
 754     #define CFG_EEPROM_TOUCHSCREEN_CAL_CN       (uint16_t)(0x0039)    // 4
 755     #define CFG_EEPROM_TOUCHSCREEN_CAL_DN       (uint16_t)(0x003D)    // 4
 756     #define CFG_EEPROM_TOUCHSCREEN_CAL_EN       (uint16_t)(0x0041)    // 4
 757     #define CFG_EEPROM_TOUCHSCREEN_CAL_FN       (uint16_t)(0x0045)    // 4
 758     #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER  (uint16_t)(0x0049)    // 4
 759     #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD   (uint16_t)(0x004D)    // 1
 760 /*=========================================================================*/
 761
 762
 763 /*=========================================================================
 764     LM75B TEMPERATURE SENSOR
 765     -----------------------------------------------------------------------
 766
 767     CFG_LM75B                 If defined, drivers for an optional LM75B
 768                               temperature sensor will be included during
 769                               build (requires external HW)
 770
 771     -----------------------------------------------------------------------*/
 772     // #define CFG_LM75B
 773 /*=========================================================================*/
 774
 775
 776 /*=========================================================================
 777     CHIBI WIRELESS STACK
 778     -----------------------------------------------------------------------
 779
 780     CFG_CHIBI                   If defined, the CHIBI wireless stack will be
 781                                 included during build.  Requires external HW.
 782     CFG_CHIBI_MODE              The mode to use when receiving and transmitting
 783                                 wireless data.  See chb_drvr.h for possible values
 784     CFG_CHIBI_POWER             The power level to use when transmitting.  See
 785                                 chb_drvr.h for possible values
 786     CFG_CHIBI_CHANNEL           802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
 787     CFG_CHIBI_PANID             16-bit PAN Identifier (ex.0x1234)
 788     CFG_CHIBI_PROMISCUOUS       Set to 1 to enabled promiscuous mode or
 789                                 0 to disable it.  If promiscuous mode is
 790                                 enabled be sure to set CFG_CHIBI_BUFFERSIZE
 791                                 to an appropriately large value (ex. 1024)
 792     CFG_CHIBI_BUFFERSIZE        The size of the message buffer in bytes
 793
 794     DEPENDENCIES:               Chibi requires the use of SSP0, 16-bit timer
 795                                 0 and pins 3.1, 3.2, 3.3.  It also requires
 796                                 the presence of CFG_I2CEEPROM.
 797
 798     NOTE:                       These settings are not relevant to all boards!
 799                                 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
 800                                 show how 'CHIBI' is meant to be connected
 801     -----------------------------------------------------------------------*/
 802     #ifdef CFG_BRD_LPC1343_REFDESIGN
 803       // #define CFG_CHIBI
 804       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 805       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 806       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 807       #define CFG_CHIBI_PANID             (0x1234)
 808       #define CFG_CHIBI_PROMISCUOUS       (0)
 809       #define CFG_CHIBI_BUFFERSIZE        (128)
 810     #endif
 811
 812     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 813       // #define CFG_CHIBI
 814       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 815       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 816       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 817       #define CFG_CHIBI_PANID             (0x1234)
 818       #define CFG_CHIBI_PROMISCUOUS       (0)
 819       #define CFG_CHIBI_BUFFERSIZE        (128)
 820     #endif
 821
 822     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 823       // #define CFG_CHIBI
 824       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 825       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 826       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 827       #define CFG_CHIBI_PANID             (0x1234)
 828       #define CFG_CHIBI_PROMISCUOUS       (0)
 829       #define CFG_CHIBI_BUFFERSIZE        (128)
 830     #endif
 831
 832     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 833       #define CFG_CHIBI
 834       #define CFG_CHIBI_MODE              (0)                 // OQPSK_868MHZ
 835       #define CFG_CHIBI_POWER             (0xE9)              // CHB_PWR_EU2_3DBM
 836       #define CFG_CHIBI_CHANNEL           (0)                 // 868-868.6 MHz
 837       #define CFG_CHIBI_PANID             (0x1234)
 838       #define CFG_CHIBI_PROMISCUOUS       (0)
 839       #define CFG_CHIBI_BUFFERSIZE        (1024)
 840     #endif
 841 /*=========================================================================*/
 842
 843
 844 /*=========================================================================
 845     TFT LCD
 846     -----------------------------------------------------------------------
 847
 848     CFG_TFTLCD                  If defined, this will cause drivers for
 849                                 a pre-determined LCD screen to be included
 850                                 during build.  Only one LCD driver can be
 851                                 included during the build process (for ex.
 852                                 'drivers/lcd/hw/ILI9325.c')
 853     CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
 854                                 included for 3x6, 5x8, 7x8 and 8x8 fonts.
 855                                 This should only be enabled if these small
 856                                 fonts are required since there is already
 857                                 support for larger fonts generated with
 858                                 Dot Factory
 859                                 http://www.pavius.net/downloads/tools/53-the-dot-factory
 860     CFG_TFTLCD_TS_DEFAULTTHRESHOLD  Default minimum threshold to trigger a
 861                                 touch event with the touch screen (and exit
 862                                 from 'tsWaitForEvent' in touchscreen.c).
 863                                 Should be an 8-bit value somewhere between
 864                                 8 and 75 in normal circumstances.  This is
 865                                 the default value and may be overriden by
 866                                 a value stored in EEPROM.
 867     CFG_TFTLCD_TS_KEYPADDELAY   The delay in milliseconds between key
 868                                 presses in dialogue boxes
 869
 870     PIN LAYOUT:                 The pin layout that is used by this driver
 871                                 can be seen in the following schematic:
 872                                 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
 873
 874     DEPENDENCIES:               TFTLCD requires the use of pins 1.8, 1.9,
 875                                 1.10, 1.11, 3.3 and 2.1-9.
 876     -----------------------------------------------------------------------*/
 877     #ifdef CFG_BRD_LPC1343_REFDESIGN
 878       // #define CFG_TFTLCD
 879       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 880       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 881       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 882     #endif
 883
 884     #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
 885       // #define CFG_TFTLCD
 886       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 887       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 888       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 889     #endif
 890
 891     #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
 892       #define CFG_TFTLCD
 893       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 894       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 895       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 896     #endif
 897
 898     #ifdef CFG_BRD_LPC1343_802154USBSTICK
 899       // #define CFG_TFTLCD
 900       #define CFG_TFTLCD_INCLUDESMALLFONTS   (0)
 901       #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
 902       #define CFG_TFTLCD_TS_KEYPADDELAY      (100)
 903     #endif
 904 /*=========================================================================*/
 905
 906
 907 /*=========================================================================
 908     Monochrome/Bitmap Graphic LCDs
 909     -----------------------------------------------------------------------
 910
 911     CFG_ST7565                If defined, this will cause drivers for
 912                               the 128x64 pixel ST7565 LCD to be included
 913     CFG_SSD1306               If defined, this will cause drivers for
 914                               the 128x64 pixel SSD1306 OLED display to be
 915                               included
 916     CFG_SHARPMEM              If defined, this will cause drivers for
 917                               Sharp Memory Displays to be included
 918
 919     DEPENDENCIES:             ST7565 requires the use of pins 2.1-6.
 920     DEPENDENCIES:             SSD1306 requires the use of pins 2.1-6.
 921     DEPENDENCIES:             SHARPMEM requires the use of pins 2.1-4.
 922     -----------------------------------------------------------------------*/
 923     // #define CFG_ST7565
 924     // #define CFG_SSD1306
 925     // #define CFG_SHARPMEM
 926 /*=========================================================================*/
 927
 928
 929 /*=========================================================================
 930     RSA Encryption
 931     -----------------------------------------------------------------------
 932
 933     CFG_RSA                     If defined, support for basic RSA
 934                                 encryption will be included.
 935     CFG_RSA_BITS                Indicates the number of bits used for
 936                                 RSA encryption keys.  To keep code size
 937                                 reasonable, RSA encryption is currently
 938                                 limited to using 64-bit or 32-bit numbers,
 939                                 with 64-bit providing higher security, and
 940                                 32-bit providing smaller encrypted text
 941                                 size.
 942
 943     NOTE:                       Please note that Printf can not be
 944                                 used to display 64-bit values (%lld)!
 945     -----------------------------------------------------------------------*/
 946     // #define CFG_RSA
 947     #define CFG_RSA_BITS                  (32)
 948 /*=========================================================================*/
 949
 950
 951
 952
 953 /*=========================================================================
 954   CONFIG FILE VALIDATION
 955   -------------------------------------------------------------------------
 956   Basic error checking to make sure that incompatible defines are not
 957   enabled at the same time, etc.
 958
 959   =========================================================================*/
 960
 961 #if !defined CFG_BRD_LPC1343_REFDESIGN && !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && !defined CFG_BRD_LPC1343_802154USBSTICK
 962   #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
 963 #endif
 964
 965 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
 966   #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
 967 #endif
 968
 969 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
 970   #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
 971 #endif
 972
 973 #if defined CFG_USBCDC && defined CFG_USBHID
 974   #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
 975 #endif
 976
 977 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
 978   #error "Only one SCK pin can be defined at a time for SSP0"
 979 #endif
 980
 981 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
 982   #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
 983 #endif
 984
 985 #ifdef CFG_INTERFACE
 986   #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
 987     #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
 988   #endif
 989   #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
 990     #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
 991   #endif
 992 #endif
 993
 994 #ifdef CFG_CHIBI
 995   #if !defined CFG_I2CEEPROM
 996     #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
 997   #endif
 998   #ifdef CFG_SDCARD
 999     #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1000   #endif
1001   #ifdef CFG_TFTLCD
1002     #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1003   #endif
1004   #ifdef CFG_PWM
1005     #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1006   #endif
1007   #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1008     #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1009   #endif
1010 #endif
1011
1012 #ifdef CFG_TFTLCD
1013   #ifdef CFG_ST7565
1014     #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1015   #endif
1016   #ifdef CFG_SSD1306
1017     #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1018   #endif
1019   #ifdef CFG_PWM
1020     #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1021   #endif
1022   #if !defined CFG_I2CEEPROM
1023     #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1024   #endif
1025 #endif
1026
1027 #ifdef CFG_SDCARD
1028   #ifdef CFG_STEPPER
1029     #error  "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1030   #endif
1031 #endif
1032
1033 #ifdef CFG_ST7565
1034   #ifdef CFG_SSD1306
1035     #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1036   #endif
1037 #endif
1038
1039 #ifdef CFG_RSA
1040   #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1041     #error "CFG_RSA_BITS must be equal to either 32 or 64."
1042   #endif
1043 #endif
1044
1045 #endif