First commit
[hackover2013-badge-firmware.git] / projectconfig.h
1 /**************************************************************************/
2 /*!
3 @file projectconfig.h
4 @author K. Townsend (microBuilder.eu)
5
6 @section LICENSE
7
8 Software License Agreement (BSD License)
9
10 Copyright (c) 2010, microBuilder SARL
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35 /**************************************************************************/
36
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
39
40 #include "lpc134x.h"
41 #include "sysdefs.h"
42
43 /*=========================================================================
44 BOARD SELECTION
45
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
50
51 CFG_BRD_LPC1343_REFDESIGN
52 =========================
53
54 microBuilder.eu LPC1343 Reference Design base board with
55 on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
56
57 This is the recommended starting point for new development
58 since it makes it easy to send printf output to USB CDC, access
59 the on-board EEPROM, etc.
60
61 CFG_BRD_LPC1343_REFDESIGN_MINIMAL
62 =================================
63
64 microBuilder.eu LPC1343 Reference Design base board with
65 only the most common peripherals initialised by default.
66
67 Results in smallest code since EEPROM, USB, etc., are not
68 initialised on startup. By default, only the following
69 peripherals are initialised by systemInit():
70
71 - CPU (Configures the PLL, etc.)
72 - GPIO
73 - SysTick Timer
74 - UART (with printf support) *
75
76 * Can be removed to save 0.8kb in debug and 0.3 kb in
77 release. Comment out 'CFG_PRINTF_UART' to disable it.
78
79 The code size can be further reduced by several KB by removing
80 any IRQ Handlers that are not used. The I2C IRQHandler, for
81 example, uses ~1KB of flash in debug and ~400KB in release mode,
82 but because it is referenced in the startup code it is always
83 included even if I2C is never used in the project.
84
85 Other IRQ Handlers that you might be able to comment out
86 to save some space are:
87
88 IRQ Handler Debug Release
89 ------------------------- ------ -------
90 I2C_IRQHandler 1160 b 400 b
91 SSP_IRQHandler 160 b 76 b
92 UART_IRQHandler 246 b 116 b
93 WAKEUP_IRQHandler 160 b 100 b
94 WDT_IRQHandler 50 b 28 b
95
96 CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
97 ====================================
98
99 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
100 for the CLI interface.
101
102 CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
103 =====================================
104
105 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
106 for the CLI interface.
107
108 CFG_BRD_LPC1343_802154USBSTICK
109 ==============================
110
111 microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
112
113 -----------------------------------------------------------------------*/
114 #define CFG_BRD_LPC1343_REFDESIGN
115 // #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
116 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
117 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
118 // #define CFG_BRD_LPC1343_802154USBSTICK
119 // #define CFG_BRD_LPC1343_OLIMEX_P
120 /*=========================================================================*/
121
122
123 /**************************************************************************
124 PIN USAGE
125 -----------------------------------------------------------------------
126 This table tries to give an indication of which GPIO pins and
127 peripherals are used by the available drivers and SW examples. Only
128 dedicated GPIO pins available on the LPC1343 Reference Board are shown
129 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
130 also be used as GPIO if they are available.
131
132 PORT 1 PORT 2 PORT 3
133 ========= ================= =======
134 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
135
136 SDCARD . . . . . . . . . . . . . X . . .
137 PWM . X . . . . . . . . . . . . . . .
138 STEPPER . . . . . . . . . . . . . X X X X
139 CHIBI X X X . . . . . . . . . . . . . .
140 ILI9325/8 X X X X X X X X X X X X X . . . X
141 ST7565 X X X X X X X X X X X X X . . . X
142 ST7735 . . . . X X X X X X . . . . . . .
143 SHARPMEM . . . . X X X X . . . . . . . . .
144 SSD1306 . . . . X X X . X X . . . . . . .
145 SSD1351 . . . . X X X X X . . . . . . . .
146 MCP121 . . . . . . . . . . . . . . X . .
147
148 TIMERS SSP ADC UART
149 ====================== === ======= ====
150 16B0 16B1 32B0 32B1 0 0 1 2 3 0
151
152 SDCARD . . . . X . . . . .
153 PWM . X . . . . . . . .
154 PMU [1] . . X . . . . . . .
155 USB . . . X . . . . . .
156 STEPPER . . X . . . . . . .
157 CHIBI x . . . X . . . . .
158 ILI9325/8 . . . . . X X X X .
159 ST7565 . . . . . X X X X .
160 ST7535 . . . . . . . . . .
161 SHARPMEM . . . . . . . . . .
162 SSD1306 . . . . . . . . . .
163 INTERFACE . . . . . . . . . X[2]
164
165 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
166 can safely be used by other peripherals, but may need to be
167 reconfigured when you wakeup from deep-sleep.
168 [2] INTERFACE can be configured to use either USBCDC or UART
169
170 **************************************************************************/
171
172
173 /**************************************************************************
174 I2C Addresses
175 -----------------------------------------------------------------------
176 The following addresses are used by the different I2C sensors included
177 in the code base [1]
178
179 HEX BINARY
180 ==== ========
181 ISL12022M (RTC) 0xDE 1101111x
182 ISL12022M (SRAM) 0xAE 1010111x
183 LM75B 0x90 1001000x
184 MCP24AA 0xA0 1010000x
185 MCP4725 0xC0 1100000x
186 TSL2561 0x72 0111001x
187 TCS3414 0x72 0111001x
188
189 [1] Alternative addresses may exists, but the addresses listed in this
190 table are the values used in the code base
191
192 **************************************************************************/
193
194
195 /*=========================================================================
196 FIRMWARE VERSION SETTINGS
197 -----------------------------------------------------------------------*/
198 #define CFG_FIRMWARE_VERSION_MAJOR (0)
199 #define CFG_FIRMWARE_VERSION_MINOR (9)
200 #define CFG_FIRMWARE_VERSION_REVISION (8)
201 /*=========================================================================*/
202
203
204 /*=========================================================================
205 CORE CPU SETTINGS
206 -----------------------------------------------------------------------
207
208 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
209 be modified to change the clock speed, but the value
210 should be indicated here since CFG_CPU_CCLK is used by
211 other peripherals to determine timing.
212
213 -----------------------------------------------------------------------*/
214 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
215 /*=========================================================================*/
216
217
218 /*=========================================================================
219 SYSTICK TIMER
220 -----------------------------------------------------------------------
221
222 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
223 of the systick timer.
224
225 -----------------------------------------------------------------------*/
226 #define CFG_SYSTICK_DELAY_IN_MS (1)
227 /*=========================================================================*/
228
229
230 /*=========================================================================
231 ALTERNATE RESET PIN
232 -----------------------------------------------------------------------
233
234 CFG_ALTRESET If defined, indicates that a GPIO pin should be
235 configured as an alternate reset pin in addition
236 to the dedicated reset pin.
237 CFG_ALTRESET_PORT The GPIO port where the alt reset pin is located
238 CFG_ALTRESET_PIN The GPIO pin where the alt reset pin is located
239
240 -----------------------------------------------------------------------*/
241 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
242 #define CFG_ALTRESET
243 #define CFG_ALTRESET_PORT (1)
244 #define CFG_ALTRESET_PIN (5) // P1.5 = RTS
245 #endif
246 /*=========================================================================*/
247
248
249 /*=========================================================================
250 UART
251 -----------------------------------------------------------------------
252
253 CFG_UART_BAUDRATE The default UART speed. This value is used
254 when initialising UART, and should be a
255 standard value like 57600, 9600, etc.
256 NOTE: This value may be overridden if
257 another value is stored in EEPROM!
258 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
259 will determine the maximum number of received
260 characters to store in memory.
261
262 -----------------------------------------------------------------------*/
263 #ifdef CFG_BRD_LPC1343_REFDESIGN
264 #define CFG_UART_BAUDRATE (115200)
265 #define CFG_UART_BUFSIZE (512)
266 #endif
267
268 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
269 #define CFG_UART_BAUDRATE (115200)
270 #define CFG_UART_BUFSIZE (512)
271 #endif
272
273 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
274 #define CFG_UART_BAUDRATE (115200)
275 #define CFG_UART_BUFSIZE (512)
276 #endif
277
278 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
279 #define CFG_UART_BAUDRATE (57600)
280 #define CFG_UART_BUFSIZE (512)
281 #endif
282
283 #ifdef CFG_BRD_LPC1343_802154USBSTICK
284 #define CFG_UART_BAUDRATE (115200)
285 #define CFG_UART_BUFSIZE (512)
286 #endif
287
288 #ifdef CFG_BRD_LPC1343_OLIMEX_P
289 #define CFG_UART_BAUDRATE (115200)
290 #define CFG_UART_BUFSIZE (512)
291 #endif
292 /*=========================================================================*/
293
294
295 /*=========================================================================
296 SSP
297 -----------------------------------------------------------------------
298
299 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
300 CFG_SSP0_SCKPIN_0_6
301
302 -----------------------------------------------------------------------*/
303 #ifdef CFG_BRD_LPC1343_REFDESIGN
304 #define CFG_SSP0_SCKPIN_2_11
305 // #define CFG_SSP0_SCKPIN_0_6
306 #endif
307
308 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
309 #define CFG_SSP0_SCKPIN_2_11
310 // #define CFG_SSP0_SCKPIN_0_6
311 #endif
312
313 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
314 #define CFG_SSP0_SCKPIN_2_11
315 // #define CFG_SSP0_SCKPIN_0_6
316 #endif
317
318 #ifdef CFG_BRD_LPC1343_802154USBSTICK
319 // #define CFG_SSP0_SCKPIN_2_11
320 #define CFG_SSP0_SCKPIN_0_6
321 #endif
322
323 #ifdef CFG_BRD_LPC1343_OLIMEX_P
324 #define CFG_SSP0_SCKPIN_2_11
325 // #define CFG_SSP0_SCKPIN_0_6
326 #endif
327 /*=========================================================================*/
328
329
330 /*=========================================================================
331 ON-BOARD LED
332 -----------------------------------------------------------------------
333
334 CFG_LED_PORT The port for the on board LED
335 CFG_LED_PIN The pin for the on board LED
336 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
337 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
338
339 -----------------------------------------------------------------------*/
340 #ifdef CFG_BRD_LPC1343_REFDESIGN
341 #define CFG_LED_PORT (2)
342 #define CFG_LED_PIN (10)
343 #define CFG_LED_ON (0)
344 #define CFG_LED_OFF (1)
345 #endif
346
347 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
348 #define CFG_LED_PORT (2)
349 #define CFG_LED_PIN (10)
350 #define CFG_LED_ON (0)
351 #define CFG_LED_OFF (1)
352 #endif
353
354 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
355 #define CFG_LED_PORT (2)
356 #define CFG_LED_PIN (10)
357 #define CFG_LED_ON (0)
358 #define CFG_LED_OFF (1)
359 #endif
360
361 #ifdef CFG_BRD_LPC1343_802154USBSTICK
362 #define CFG_LED_PORT (3)
363 #define CFG_LED_PIN (2)
364 #define CFG_LED_ON (0)
365 #define CFG_LED_OFF (1)
366 #endif
367
368 #ifdef CFG_BRD_LPC1343_OLIMEX_P
369 #define CFG_LED_PORT (3)
370 #define CFG_LED_PIN (2)
371 #define CFG_LED_ON (0)
372 #define CFG_LED_OFF (1)
373 #endif
374 /*=========================================================================*/
375
376
377 /*=========================================================================
378 MICRO-SD CARD
379 -----------------------------------------------------------------------
380
381 CFG_SDCARD If this field is defined SD Card and FAT32
382 file system support will be included
383 CFG_SDCARD_READONLY If this is set to 1, all commands to
384 write to the SD card will be removed
385 saving some flash space.
386 CFG_SDCARD_CDPORT The card detect port number
387 CFG_SDCARD_CDPIN The card detect pin number
388
389 NOTE: All config settings for FAT32 are defined
390 in ffconf.h
391
392 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
393 ~300KB/s (w/512 byte read buffer)
394
395 PIN LAYOUT: The pin layout that is used by this driver
396 can be seen in the following schematic:
397 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
398
399 DEPENDENCIES: SDCARD requires the use of SSP0.
400 -----------------------------------------------------------------------*/
401 #ifdef CFG_BRD_LPC1343_REFDESIGN
402 // #define CFG_SDCARD
403 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
404 #define CFG_SDCARD_CDPORT (3)
405 #define CFG_SDCARD_CDPIN (0)
406 #endif
407
408 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
409 // #define CFG_SDCARD
410 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
411 #define CFG_SDCARD_CDPORT (3)
412 #define CFG_SDCARD_CDPIN (0)
413 #endif
414
415 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
416 #define CFG_SDCARD
417 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
418 #define CFG_SDCARD_CDPORT (3)
419 #define CFG_SDCARD_CDPIN (0)
420 #endif
421
422 #ifdef CFG_BRD_LPC1343_802154USBSTICK
423 // #define CFG_SDCARD
424 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
425 #define CFG_SDCARD_CDPORT (3)
426 #define CFG_SDCARD_CDPIN (0)
427 #endif
428
429 #ifdef CFG_BRD_LPC1343_OLIMEX_P
430 // #define CFG_SDCARD
431 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
432 #define CFG_SDCARD_CDPORT (3)
433 #define CFG_SDCARD_CDPIN (0)
434 #endif
435 /*=========================================================================*/
436
437
438 /*=========================================================================
439 USB
440 -----------------------------------------------------------------------
441
442 CFG_USBHID If this field is defined USB HID support will
443 be included. Currently uses ROM-based USB HID
444 CFG_USBCDC If this field is defined USB CDC support will
445 be included, with the USB Serial Port speed
446 set to 115200 BPS by default
447 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
448 when initialising USBCDC, and should be a
449 standard value like 57600, 9600, etc.
450 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
451 USB to connect. Must be a multiple of 10!
452 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
453 printf data until it can be sent out in
454 64 byte frames. The buffer is required since
455 only one frame per ms can be sent using USB
456 CDC (see 'puts' in systeminit.c).
457
458 -----------------------------------------------------------------------*/
459 #define CFG_USB_VID (0x239A)
460 #define CFG_USB_PID (0x1002)
461
462 #ifdef CFG_BRD_LPC1343_REFDESIGN
463 // #define CFG_USBHID
464 #define CFG_USBCDC
465 #define CFG_USBCDC_BAUDRATE (115200)
466 #define CFG_USBCDC_INITTIMEOUT (5000)
467 #define CFG_USBCDC_BUFFERSIZE (256)
468 #endif
469
470 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
471 // #define CFG_USBHID
472 // #define CFG_USBCDC
473 #define CFG_USBCDC_BAUDRATE (115200)
474 #define CFG_USBCDC_INITTIMEOUT (5000)
475 #define CFG_USBCDC_BUFFERSIZE (256)
476 #endif
477
478 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
479 // #define CFG_USBHID
480 #define CFG_USBCDC
481 #define CFG_USBCDC_BAUDRATE (115200)
482 #define CFG_USBCDC_INITTIMEOUT (5000)
483 #define CFG_USBCDC_BUFFERSIZE (256)
484 #endif
485
486 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
487 // #define CFG_USBHID
488 // #define CFG_USBCDC
489 #define CFG_USBCDC_BAUDRATE (57600)
490 #define CFG_USBCDC_INITTIMEOUT (5000)
491 #define CFG_USBCDC_BUFFERSIZE (256)
492 #endif
493
494 #ifdef CFG_BRD_LPC1343_802154USBSTICK
495 // #define CFG_USBHID
496 #define CFG_USBCDC
497 #define CFG_USBCDC_BAUDRATE (115200)
498 #define CFG_USBCDC_INITTIMEOUT (5000)
499 #define CFG_USBCDC_BUFFERSIZE (256)
500 #endif
501
502 #ifdef CFG_BRD_LPC1343_OLIMEX_P
503 // #define CFG_USBHID
504 #define CFG_USBCDC
505 #define CFG_USBCDC_BAUDRATE (115200)
506 #define CFG_USBCDC_INITTIMEOUT (5000)
507 #define CFG_USBCDC_BUFFERSIZE (256)
508 #endif
509 /*=========================================================================*/
510
511
512 /*=========================================================================
513 PRINTF REDIRECTION
514 -----------------------------------------------------------------------
515
516 CFG_PRINTF_UART Will cause all printf statements to be
517 redirected to UART
518 CFG_PRINTF_USBCDC Will cause all printf statements to be
519 redirect to USB Serial
520 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
521 "\n" for *nix
522
523 Note: If no printf redirection definitions are present, all printf
524 output will be ignored.
525 -----------------------------------------------------------------------*/
526 #ifdef CFG_BRD_LPC1343_REFDESIGN
527 // #define CFG_PRINTF_UART
528 #define CFG_PRINTF_USBCDC
529 #define CFG_PRINTF_NEWLINE "\r\n"
530 #endif
531
532 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
533 #define CFG_PRINTF_UART
534 // #define CFG_PRINTF_USBCDC
535 #define CFG_PRINTF_NEWLINE "\r\n"
536 #endif
537
538 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
539 // #define CFG_PRINTF_UART
540 #define CFG_PRINTF_USBCDC
541 #define CFG_PRINTF_NEWLINE "\r\n"
542 #endif
543
544 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
545 #define CFG_PRINTF_UART
546 // #define CFG_PRINTF_USBCDC
547 #define CFG_PRINTF_NEWLINE "\n"
548 #endif
549
550 #ifdef CFG_BRD_LPC1343_802154USBSTICK
551 // #define CFG_PRINTF_UART
552 #define CFG_PRINTF_USBCDC
553 #define CFG_PRINTF_NEWLINE "\r\n"
554 #endif
555
556 #ifdef CFG_BRD_LPC1343_OLIMEX_P
557 // #define CFG_PRINTF_UART
558 #define CFG_PRINTF_USBCDC
559 #define CFG_PRINTF_NEWLINE "\r\n"
560 #endif
561 /*=========================================================================*/
562
563
564 /*=========================================================================
565 COMMAND LINE INTERFACE
566 -----------------------------------------------------------------------
567
568 CFG_INTERFACE If this field is defined the UART or USBCDC
569 based command-line interface will be included
570 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
571 incoming command
572 CFG_INTERFACE_PROMPT The command prompt to display at the start
573 of every new data entry line
574 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
575 response to commands will be send to the
576 output buffer. The command prompt will not
577 be displayed and incoming text will not be
578 echoed back to the output buffer (allowing
579 you to see the text you have input). This
580 is normally only desirable in a situation
581 where another MCU is communicating with
582 the LPC1343.
583 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
584 characters will be dropped
585 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
586 set high when a command starts executing
587 and will go low when the command has
588 finished executing or the LCD is not busy.
589 This allows another device to know when a
590 new command can safely be sent.
591 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
592 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
593 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
594 error messages will be returned (followed
595 by CFG_PRINTF_NEWLINE), rather than more
596 verbose error messages. The specific
597 characters used are defined below.
598 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
599 will be sent when the command prompt is
600 ready for a new command. This is in
601 addition to CFG_INTERFACE_ENABLEIRQ if
602 this is also enabled. The character used
603 is defined below.
604
605 NOTE: The command-line interface will use either
606 USB-CDC or UART depending on whether
607 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
608 selected.
609 -----------------------------------------------------------------------*/
610 #ifdef CFG_BRD_LPC1343_REFDESIGN
611 #define CFG_INTERFACE
612 #define CFG_INTERFACE_MAXMSGSIZE (256)
613 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
614 #define CFG_INTERFACE_SILENTMODE (0)
615 #define CFG_INTERFACE_DROPCR (0)
616 #define CFG_INTERFACE_ENABLEIRQ (0)
617 #define CFG_INTERFACE_IRQPORT (0)
618 #define CFG_INTERFACE_IRQPIN (7)
619 #define CFG_INTERFACE_SHORTERRORS (0)
620 #define CFG_INTERFACE_CONFIRMREADY (0)
621 #endif
622
623 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
624 // #define CFG_INTERFACE
625 #define CFG_INTERFACE_MAXMSGSIZE (256)
626 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
627 #define CFG_INTERFACE_SILENTMODE (0)
628 #define CFG_INTERFACE_DROPCR (0)
629 #define CFG_INTERFACE_ENABLEIRQ (0)
630 #define CFG_INTERFACE_IRQPORT (0)
631 #define CFG_INTERFACE_IRQPIN (7)
632 #define CFG_INTERFACE_SHORTERRORS (0)
633 #define CFG_INTERFACE_CONFIRMREADY (0)
634 #endif
635
636 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
637 #define CFG_INTERFACE
638 #define CFG_INTERFACE_MAXMSGSIZE (256)
639 #define CFG_INTERFACE_PROMPT "CMD >> "
640 #define CFG_INTERFACE_SILENTMODE (0)
641 #define CFG_INTERFACE_DROPCR (0)
642 #define CFG_INTERFACE_ENABLEIRQ (0)
643 #define CFG_INTERFACE_IRQPORT (0)
644 #define CFG_INTERFACE_IRQPIN (7)
645 #define CFG_INTERFACE_SHORTERRORS (0)
646 #define CFG_INTERFACE_CONFIRMREADY (0)
647 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
648 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
649 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
650 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
651 #endif
652
653 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
654 #define CFG_INTERFACE
655 #define CFG_INTERFACE_MAXMSGSIZE (256)
656 #define CFG_INTERFACE_PROMPT ">>"
657 #define CFG_INTERFACE_SILENTMODE (1)
658 #define CFG_INTERFACE_DROPCR (1)
659 #define CFG_INTERFACE_ENABLEIRQ (1)
660 #define CFG_INTERFACE_IRQPORT (0)
661 #define CFG_INTERFACE_IRQPIN (7)
662 #define CFG_INTERFACE_SHORTERRORS (1)
663 #define CFG_INTERFACE_CONFIRMREADY (0)
664 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
665 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
666 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
667 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
668 #endif
669
670 #ifdef CFG_BRD_LPC1343_802154USBSTICK
671 // #define CFG_INTERFACE
672 #define CFG_INTERFACE_MAXMSGSIZE (256)
673 #define CFG_INTERFACE_PROMPT "CMD >> "
674 #define CFG_INTERFACE_SILENTMODE (0)
675 #define CFG_INTERFACE_DROPCR (0)
676 #define CFG_INTERFACE_ENABLEIRQ (0)
677 #define CFG_INTERFACE_IRQPORT (0)
678 #define CFG_INTERFACE_IRQPIN (7)
679 #define CFG_INTERFACE_SHORTERRORS (0)
680 #define CFG_INTERFACE_CONFIRMREADY (0)
681 #endif
682
683 #ifdef CFG_BRD_LPC1343_OLIMEX_P
684 #define CFG_INTERFACE
685 #define CFG_INTERFACE_MAXMSGSIZE (256)
686 #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
687 #define CFG_INTERFACE_SILENTMODE (0)
688 #define CFG_INTERFACE_DROPCR (0)
689 #define CFG_INTERFACE_ENABLEIRQ (0)
690 #define CFG_INTERFACE_IRQPORT (0)
691 #define CFG_INTERFACE_IRQPIN (7)
692 #define CFG_INTERFACE_SHORTERRORS (0)
693 #define CFG_INTERFACE_CONFIRMREADY (0)
694 #endif
695 /*=========================================================================*/
696
697
698 /*=========================================================================
699 PWM SETTINGS
700 -----------------------------------------------------------------------
701
702 CFG_PWM If this is defined, a basic PWM driver
703 will be included using 16-bit Timer 1 and
704 Pin 1.9 (MAT0) for the PWM output. In
705 order to allow for a fixed number of
706 pulses to be generated, some PWM-specific
707 code is required in the 16-Bit Timer 1
708 ISR. See "core/timer16/timer16.c" for
709 more information.
710 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
711 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
712
713 DEPENDENCIES: PWM output requires the use of 16-bit
714 timer 1 and pin 1.9 (CT16B1_MAT0).
715 -----------------------------------------------------------------------*/
716 // #define CFG_PWM
717 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
718 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
719 /*=========================================================================*/
720
721
722 /*=========================================================================
723 STEPPER MOTOR SETTINGS
724 -----------------------------------------------------------------------
725
726 CFG_STEPPER If this is defined, a simple bi-polar
727 stepper motor will be included for common
728 H-bridge chips like the L293D or SN754410N
729
730 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
731 32-bit Timer 0.
732 -----------------------------------------------------------------------*/
733 // #define CFG_STEPPER
734 /*=========================================================================*/
735
736
737 /*=========================================================================
738 EEPROM
739 -----------------------------------------------------------------------
740
741 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
742 will be included during build
743 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
744
745 -----------------------------------------------------------------------*/
746 #ifdef CFG_BRD_LPC1343_REFDESIGN
747 #define CFG_I2CEEPROM
748 #define CFG_I2CEEPROM_SIZE (3072)
749 #endif
750
751 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
752 // #define CFG_I2CEEPROM
753 #define CFG_I2CEEPROM_SIZE (3072)
754 #endif
755
756 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
757 #define CFG_I2CEEPROM
758 #define CFG_I2CEEPROM_SIZE (3072)
759 #endif
760
761 #ifdef CFG_BRD_LPC1343_802154USBSTICK
762 #define CFG_I2CEEPROM
763 #define CFG_I2CEEPROM_SIZE (3072)
764 #endif
765
766 #ifdef CFG_BRD_LPC1343_OLIMEX_P
767 // #define CFG_I2CEEPROM
768 #define CFG_I2CEEPROM_SIZE (3072)
769 #endif
770 /*=========================================================================*/
771
772
773 /*=========================================================================
774 EEPROM MEMORY MAP
775 -----------------------------------------------------------------------
776 EEPROM is used to persist certain user modifiable values to make
777 sure that these changes remain in effect after a reset or hard
778 power-down. The addresses in EEPROM for these various system
779 settings/values are defined below. The first 256 bytes of EEPROM
780 are reserved for this (0x0000..0x00FF).
781
782 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
783
784 EEPROM Address (0x0000..0x00FF)
785 ===============================
786 0 1 2 3 4 5 6 7 8 9 A B C D E F
787 000x x x x x x x x x . x x . . . . . Chibi
788 001x . . . . . . . . . . . . . . . .
789 002x x x x x . . . . . . . . . . . . UART
790 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
791 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
792 005x . . . . . . . . . . . . . . . .
793 006x . . . . . . . . . . . . . . . .
794 007x . . . . . . . . . . . . . . . .
795 008x . . . . . . . . . . . . . . . .
796 009x . . . . . . . . . . . . . . . .
797 00Ax . . . . . . . . . . . . . . . .
798 00Bx . . . . . . . . . . . . . . . .
799 00Cx . . . . . . . . . . . . . . . .
800 00Dx . . . . . . . . . . . . . . . .
801 00Ex . . . . . . . . . . . . . . . .
802 00Fx . . . . . . . . . . . . . . . .
803
804 -----------------------------------------------------------------------*/
805 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
806 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
807 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
808 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
809 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
810 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
811 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
812 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
813 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
814 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
815 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
816 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
817 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
818 /*=========================================================================*/
819
820
821 /*=========================================================================
822 LM75B TEMPERATURE SENSOR
823 -----------------------------------------------------------------------
824
825 CFG_LM75B If defined, drivers for an optional LM75B
826 temperature sensor will be included during
827 build (requires external HW)
828
829 -----------------------------------------------------------------------*/
830 // #define CFG_LM75B
831 /*=========================================================================*/
832
833
834 /*=========================================================================
835 CHIBI WIRELESS STACK
836 -----------------------------------------------------------------------
837
838 CFG_CHIBI If defined, the CHIBI wireless stack will be
839 included during build. Requires external HW.
840 CFG_CHIBI_MODE The mode to use when receiving and transmitting
841 wireless data. See chb_drvr.h for possible values
842 CFG_CHIBI_POWER The power level to use when transmitting. See
843 chb_drvr.h for possible values
844 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
845 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
846 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
847 0 to disable it. If promiscuous mode is
848 enabled be sure to set CFG_CHIBI_BUFFERSIZE
849 to an appropriately large value (ex. 1024)
850 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
851
852 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
853 0 and pins 3.1, 3.2, 3.3. It also requires
854 the presence of CFG_I2CEEPROM.
855
856 NOTE: These settings are not relevant to all boards!
857 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
858 show how 'CHIBI' is meant to be connected
859 -----------------------------------------------------------------------*/
860 #ifdef CFG_BRD_LPC1343_REFDESIGN
861 // #define CFG_CHIBI
862 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
863 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
864 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
865 #define CFG_CHIBI_PANID (0x1234)
866 #define CFG_CHIBI_PROMISCUOUS (0)
867 #define CFG_CHIBI_BUFFERSIZE (128)
868 #endif
869
870 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
871 // #define CFG_CHIBI
872 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
873 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
874 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
875 #define CFG_CHIBI_PANID (0x1234)
876 #define CFG_CHIBI_PROMISCUOUS (0)
877 #define CFG_CHIBI_BUFFERSIZE (128)
878 #endif
879
880 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
881 // #define CFG_CHIBI
882 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
883 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
884 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
885 #define CFG_CHIBI_PANID (0x1234)
886 #define CFG_CHIBI_PROMISCUOUS (0)
887 #define CFG_CHIBI_BUFFERSIZE (128)
888 #endif
889
890 #ifdef CFG_BRD_LPC1343_802154USBSTICK
891 #define CFG_CHIBI
892 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
893 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
894 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
895 #define CFG_CHIBI_PANID (0x1234)
896 #define CFG_CHIBI_PROMISCUOUS (0)
897 #define CFG_CHIBI_BUFFERSIZE (1024)
898 #endif
899
900 #ifdef CFG_BRD_LPC1343_OLIMEX_P
901 // #define CFG_CHIBI
902 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
903 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
904 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
905 #define CFG_CHIBI_PANID (0x1234)
906 #define CFG_CHIBI_PROMISCUOUS (0)
907 #define CFG_CHIBI_BUFFERSIZE (128)
908 #endif
909 /*=========================================================================*/
910
911
912 /*=========================================================================
913 TFT LCD
914 -----------------------------------------------------------------------
915
916 CFG_TFTLCD If defined, this will cause drivers for
917 a pre-determined LCD screen to be included
918 during build. Only one LCD driver can be
919 included during the build process (for ex.
920 'drivers/lcd/hw/ILI9325.c')
921 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
922 included for 3x6, 5x8, 7x8 and 8x8 fonts.
923 This should only be enabled if these small
924 fonts are required since there is already
925 support for larger fonts generated with
926 Dot Factory
927 http://www.pavius.net/downloads/tools/53-the-dot-factory
928 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
929 touch event with the touch screen (and exit
930 from 'tsWaitForEvent' in touchscreen.c).
931 Should be an 8-bit value somewhere between
932 8 and 75 in normal circumstances. This is
933 the default value and may be overriden by
934 a value stored in EEPROM.
935 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
936 presses in dialogue boxes
937
938 PIN LAYOUT: The pin layout that is used by this driver
939 can be seen in the following schematic:
940 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
941
942 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
943 1.10, 1.11, 3.3 and 2.1-9.
944 -----------------------------------------------------------------------*/
945 #ifdef CFG_BRD_LPC1343_REFDESIGN
946 // #define CFG_TFTLCD
947 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
948 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
949 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
950 #endif
951
952 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
953 // #define CFG_TFTLCD
954 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
955 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
956 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
957 #endif
958
959 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
960 #define CFG_TFTLCD
961 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
962 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
963 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
964 #endif
965
966 #ifdef CFG_BRD_LPC1343_802154USBSTICK
967 // #define CFG_TFTLCD
968 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
969 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
970 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
971 #endif
972
973 #ifdef CFG_BRD_LPC1343_OLIMEX_P
974 // #define CFG_TFTLCD
975 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
976 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
977 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
978 #endif
979 /*=========================================================================*/
980
981
982 /*=========================================================================
983 Monochrome/Bitmap Graphic LCDs
984 -----------------------------------------------------------------------
985
986 CFG_ST7565 If defined, this will cause drivers for
987 the 128x64 pixel ST7565 LCD to be included
988 CFG_SSD1306 If defined, this will cause drivers for
989 the 128x64 pixel SSD1306 OLED display to be
990 included
991 CFG_SHARPMEM If defined, this will cause drivers for
992 Sharp Memory Displays to be included
993
994 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
995 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
996 DEPENDENCIES: SHARPMEM requires the use of pins 2.1-4.
997 -----------------------------------------------------------------------*/
998 // #define CFG_ST7565
999 // #define CFG_SSD1306
1000 // #define CFG_SHARPMEM
1001 /*=========================================================================*/
1002
1003
1004 /*=========================================================================
1005 RSA Encryption
1006 -----------------------------------------------------------------------
1007
1008 CFG_RSA If defined, support for basic RSA
1009 encryption will be included.
1010 CFG_RSA_BITS Indicates the number of bits used for
1011 RSA encryption keys. To keep code size
1012 reasonable, RSA encryption is currently
1013 limited to using 64-bit or 32-bit numbers,
1014 with 64-bit providing higher security, and
1015 32-bit providing smaller encrypted text
1016 size.
1017
1018 NOTE: Please note that Printf can not be
1019 used to display 64-bit values (%lld)!
1020 -----------------------------------------------------------------------*/
1021 // #define CFG_RSA
1022 #define CFG_RSA_BITS (32)
1023 /*=========================================================================*/
1024
1025
1026
1027
1028 /*=========================================================================
1029 CONFIG FILE VALIDATION
1030 -------------------------------------------------------------------------
1031 Basic error checking to make sure that incompatible defines are not
1032 enabled at the same time, etc.
1033
1034 =========================================================================*/
1035
1036 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1037 !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1038 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1039 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1040 !defined CFG_BRD_LPC1343_802154USBSTICK && \
1041 !defined CFG_BRD_LPC1343_OLIMEX_P
1042 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK)"
1043 #endif
1044
1045 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1046 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1047 #endif
1048
1049 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1050 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1051 #endif
1052
1053 #if defined CFG_USBCDC && defined CFG_USBHID
1054 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1055 #endif
1056
1057 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1058 #error "Only one SCK pin can be defined at a time for SSP0"
1059 #endif
1060
1061 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1062 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1063 #endif
1064
1065 #ifdef CFG_INTERFACE
1066 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1067 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1068 #endif
1069 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1070 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1071 #endif
1072 #endif
1073
1074 #ifdef CFG_CHIBI
1075 #if !defined CFG_I2CEEPROM
1076 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1077 #endif
1078 #ifdef CFG_SDCARD
1079 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1080 #endif
1081 #ifdef CFG_TFTLCD
1082 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1083 #endif
1084 #ifdef CFG_PWM
1085 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1086 #endif
1087 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1088 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1089 #endif
1090 #endif
1091
1092 #ifdef CFG_TFTLCD
1093 #ifdef CFG_ST7565
1094 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1095 #endif
1096 #ifdef CFG_SSD1306
1097 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1098 #endif
1099 #ifdef CFG_SHARPMEM
1100 #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1101 #endif
1102 #ifdef CFG_PWM
1103 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1104 #endif
1105 #if !defined CFG_I2CEEPROM
1106 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1107 #endif
1108 #endif
1109
1110 #ifdef CFG_SDCARD
1111 #ifdef CFG_STEPPER
1112 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1113 #endif
1114 #endif
1115
1116 #ifdef CFG_ST7565
1117 #ifdef CFG_SSD1306
1118 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1119 #endif
1120 #endif
1121
1122 #ifdef CFG_RSA
1123 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1124 #error "CFG_RSA_BITS must be equal to either 32 or 64."
1125 #endif
1126 #endif
1127
1128 #endif
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