Kaninchen aus mock übernommen
[hackover2013-badge-firmware.git] / projectconfig.h
1 /**************************************************************************/
2 /*!
3 @file projectconfig.h
4 @author K. Townsend (microBuilder.eu)
5
6 @section LICENSE
7
8 Software License Agreement (BSD License)
9
10 Copyright (c) 2012, microBuilder SARL
11 All rights reserved.
12
13 Redistribution and use in source and binary forms, with or without
14 modification, are permitted provided that the following conditions are met:
15 1. Redistributions of source code must retain the above copyright
16 notice, this list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright
18 notice, this list of conditions and the following disclaimer in the
19 documentation and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holders nor the
21 names of its contributors may be used to endorse or promote products
22 derived from this software without specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
25 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
28 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35 /**************************************************************************/
36
37 #ifndef _PROJECTCONFIG_H_
38 #define _PROJECTCONFIG_H_
39
40 #include "lpc134x.h"
41 #include "sysdefs.h"
42
43 /*=========================================================================
44 BOARD SELECTION
45
46 Because several boards use this code library with sometimes slightly
47 different pin configuration, you will need to specify which board you
48 are using by enabling one of the following definitions. The code base
49 will then try to configure itself accordingly for that board.
50
51 CFG_BRD_LPC1343_REFDESIGN
52 =========================
53
54 microBuilder.eu LPC1343 Reference Design base board with
55 on-board peripherals initialised (EEPROM, USB or UART CLI, etc.)
56
57 This is the recommended starting point for new development
58 since it makes it easy to send printf output to USB CDC, access
59 the on-board EEPROM, etc.
60
61 CFG_BRD_LPC1343_REFDESIGN_MINIMAL
62 =================================
63
64 microBuilder.eu LPC1343 Reference Design base board with
65 only the most common peripherals initialised by default.
66
67 Results in smallest code since EEPROM, USB, etc., are not
68 initialised on startup. By default, only the following
69 peripherals are initialised by systemInit():
70
71 - CPU (Configures the PLL, etc.)
72 - GPIO
73 - SysTick Timer
74 - UART (with printf support) *
75
76 * Can be removed to save 0.8kb in debug and 0.3 kb in
77 release. Comment out 'CFG_PRINTF_UART' to disable it.
78
79 The code size can be further reduced by several KB by removing
80 any IRQ Handlers that are not used. The I2C IRQHandler, for
81 example, uses ~1KB of flash in debug and ~400KB in release mode,
82 but because it is referenced in the startup code it is always
83 included even if I2C is never used in the project.
84
85 Other IRQ Handlers that you might be able to comment out
86 to save some space are:
87
88 IRQ Handler Debug Release
89 ------------------------- ------ -------
90 I2C_IRQHandler 1160 b 400 b
91 SSP_IRQHandler 160 b 76 b
92 UART_IRQHandler 246 b 116 b
93 WAKEUP_IRQHandler 160 b 100 b
94 WDT_IRQHandler 50 b 28 b
95
96 CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
97 ====================================
98
99 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with USB enabled
100 for the CLI interface.
101
102 CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
103 =====================================
104
105 microBuilder.eu/Adafruit Stand-Alone "Smart LCD" with UART enabled
106 for the CLI interface.
107
108 CFG_BRD_LPC1343_802154USBSTICK
109 ==============================
110
111 microBuilder.eu USB stick 802.15.4 868/915MHz RF transceiver
112
113 CFG_BRD_LPC1343_OLIMEX_P
114 ==============================
115
116 Simple Olimex LPC1343 breakout board
117
118 CFG_BRD_LPC1343_LPCXPRESSO
119 ==============================
120
121 LPC1343 LPCXpresso board
122
123 -----------------------------------------------------------------------*/
124 // #define CFG_BRD_LPC1343_REFDESIGN
125 #define CFG_BRD_LPC1343_REFDESIGN_MINIMAL
126 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
127 // #define CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
128 // #define CFG_BRD_LPC1343_802154USBSTICK
129 // #define CFG_BRD_LPC1343_OLIMEX_P
130 // #define CFG_BRD_LPC1343_LPCXPRESSO
131 /*=========================================================================*/
132
133
134 /**************************************************************************
135 PIN USAGE
136 -----------------------------------------------------------------------
137 This table tries to give an indication of which GPIO pins and
138 peripherals are used by the available drivers and SW examples. Only
139 dedicated GPIO pins available on the LPC1343 Reference Board are shown
140 below. Any unused peripheral blocks like I2C, SSP, ADC, etc., can
141 also be used as GPIO if they are available.
142
143 PORT 1 PORT 2 PORT 3
144 ========= ================= =======
145 8 9 10 11 1 2 3 4 5 6 7 8 9 0 1 2 3
146
147 SDCARD . . . . . . . . . . . . . X . . .
148 PWM . X . . . . . . . . . . . . . . .
149 STEPPER . . . . . . . . . . . . . X X X X
150 CHIBI X X X . . . . . . . . . . . . . .
151 ILI9325/8 X X X X X X X X X X X X X . . . X
152 ST7565 X X X X X X X X X X X X X . . . X
153 ST7735 . . . . X X X X X X . . . . . . .
154 SHARPMEM . . . . X X X X . . . . . . . . .
155 SSD1306 SPI . . . . X X X . X X . . . . . . .
156 SSD1351 . . . . X X X X X . . . . . . . .
157 MCP121 . . . . . . . . . . . . . . X . .
158 PN532 [3] . . . . . . . . . . . . . . X X .
159
160 TIMERS SSP ADC UART
161 ====================== === ======= ====
162 16B0 16B1 32B0 32B1 0 0 1 2 3 0
163
164 SDCARD . . . . X . . . . .
165 PWM . X . . . . . . . .
166 PMU [1] . . X . . . . . . .
167 USB . . . X . . . . . .
168 STEPPER . . X . . . . . . .
169 CHIBI x . . . X . . . . .
170 ILI9325/8 . . . . . X X X X .
171 ST7565 . . . . . X X X X .
172 ST7535 . . . . . . . . . .
173 SHARPMEM . . . . . . . . . .
174 SSD1306 SPI . . . . . . . . . .
175 INTERFACE . . . . . . . . . X[2]
176
177 [1] PMU uses 32-bit Timer 0 for SW wakeup from deep-sleep. This timer
178 can safely be used by other peripherals, but may need to be
179 reconfigured when you wakeup from deep-sleep.
180 [2] INTERFACE can be configured to use either USBCDC or UART
181 [3] P3.2 is only used with the I2C bus (for IRQ)
182
183 **************************************************************************/
184
185
186 /**************************************************************************
187 I2C Addresses
188 -----------------------------------------------------------------------
189 The following addresses are used by the different I2C sensors included
190 in the code base [1]
191
192 HEX BINARY
193 ==== ========
194 ISL12022M (RTC) 0xDE 1101111x
195 ISL12022M (SRAM) 0xAE 1010111x
196 LM75B 0x90 1001000x
197 MCP24AA 0xA0 1010000x
198 MCP4725 0xC0 1100000x ***
199 TEA5767 0xC0 1100000x ***
200 TSL2561 0x72 0111001x
201 TCS3414 0x72 0111001x
202 PN532 0x48 0100100x
203 SSD1306_I2C 0x78 0111100x // Assumes SA0 = GND
204 INA219 0xF0 10000000x // Assumes A0+A1 = GND
205
206 [1] Alternative addresses may exists, but the addresses listed in this
207 table are the values used in the code base
208
209 **************************************************************************/
210
211
212 /*=========================================================================
213 FIRMWARE VERSION SETTINGS
214 -----------------------------------------------------------------------*/
215 #define CFG_FIRMWARE_VERSION_MAJOR (1)
216 #define CFG_FIRMWARE_VERSION_MINOR (1)
217 #define CFG_FIRMWARE_VERSION_REVISION (0)
218 /*=========================================================================*/
219
220
221 /*=========================================================================
222 CORE CPU SETTINGS
223 -----------------------------------------------------------------------
224
225 CFG_CPU_CCLK Value is for reference only. 'core/cpu/cpu.c' must
226 be modified to change the clock speed, but the value
227 should be indicated here since CFG_CPU_CCLK is used by
228 other peripherals to determine timing.
229
230 -----------------------------------------------------------------------*/
231 #define CFG_CPU_CCLK (72000000) // 1 tick = 13.88nS
232 /*=========================================================================*/
233
234
235 /*=========================================================================
236 SYSTICK TIMER
237 -----------------------------------------------------------------------
238
239 CFG_SYSTICK_DELAY_IN_MS The number of milliseconds between each tick
240 of the systick timer.
241
242 -----------------------------------------------------------------------*/
243 #define CFG_SYSTICK_DELAY_IN_MS (1)
244 /*=========================================================================*/
245
246
247 /*=========================================================================
248 GPIO INTERRUPTS
249 -----------------------------------------------------------------------
250
251 IF you wish to use the GPIO interrupt handlers elsewhere in your code,
252 you should probably define a seperate IRQHandler for the appropriate
253 GPIO bank rather than using the definitions in core/gpio/gpio.c (to
254 avoid causing problems in other projects, and to make updates easier,
255 etc.) To disable the default IRQHandler, simply comment out the
256 define below for the appropriate GPIO bank and implement the handler
257 somewhere else.
258
259 GPIO_ENABLE_IRQ0 If defined, PIOINT0_IRQHandler will be declared and
260 handled in core/gpio/gpio.c
261 GPIO_ENABLE_IRQ1 If defined, PIOINT1_IRQHandler will be declared and
262 handled in core/gpio/gpio.c
263 GPIO_ENABLE_IRQ2 If defined, PIOINT2_IRQHandler will be declared and
264 handled in core/gpio/gpio.c
265 GPIO_ENABLE_IRQ3 If defined, PIOINT3_IRQHandler will be declared and
266 handled in core/gpio/gpio.c
267
268 -----------------------------------------------------------------------*/
269 #ifdef CFG_BRD_LPC1343_REFDESIGN
270 // #define GPIO_ENABLE_IRQ0
271 #define GPIO_ENABLE_IRQ1
272 // #define GPIO_ENABLE_IRQ2
273 // #define GPIO_ENABLE_IRQ3
274 #endif
275
276 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
277 // #define GPIO_ENABLE_IRQ0
278 #define GPIO_ENABLE_IRQ1
279 // #define GPIO_ENABLE_IRQ2
280 // #define GPIO_ENABLE_IRQ3
281 #endif
282
283 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
284 // #define GPIO_ENABLE_IRQ0
285 #define GPIO_ENABLE_IRQ1
286 // #define GPIO_ENABLE_IRQ2
287 // #define GPIO_ENABLE_IRQ3
288 #endif
289
290 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
291 // #define GPIO_ENABLE_IRQ0
292 #define GPIO_ENABLE_IRQ1
293 // #define GPIO_ENABLE_IRQ2
294 // #define GPIO_ENABLE_IRQ3
295 #endif
296
297 #ifdef CFG_BRD_LPC1343_802154USBSTICK
298 // #define GPIO_ENABLE_IRQ0
299 #define GPIO_ENABLE_IRQ1
300 // #define GPIO_ENABLE_IRQ2
301 // #define GPIO_ENABLE_IRQ3
302 #endif
303
304 #ifdef CFG_BRD_LPC1343_OLIMEX_P
305 // #define GPIO_ENABLE_IRQ0
306 #define GPIO_ENABLE_IRQ1
307 // #define GPIO_ENABLE_IRQ2
308 // #define GPIO_ENABLE_IRQ3
309 #endif
310
311 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
312 // #define GPIO_ENABLE_IRQ0
313 #define GPIO_ENABLE_IRQ1
314 // #define GPIO_ENABLE_IRQ2
315 // #define GPIO_ENABLE_IRQ3
316 #endif
317 /*=========================================================================*/
318
319
320 /*=========================================================================
321 ALTERNATE RESET PIN
322 -----------------------------------------------------------------------
323
324 CFG_ALTRESET If defined, indicates that a GPIO pin should be
325 configured as an alternate reset pin in addition
326 to the dedicated reset pin.
327 CFG_ALTRESET_PORT The GPIO port where the alt reset pin is located
328 CFG_ALTRESET_PIN The GPIO pin where the alt reset pin is located
329
330 -----------------------------------------------------------------------*/
331 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
332 #define CFG_ALTRESET
333 #define CFG_ALTRESET_PORT (1)
334 #define CFG_ALTRESET_PIN (5) // P1.5 = RTS
335 #endif
336 /*=========================================================================*/
337
338
339 /*=========================================================================
340 UART
341 -----------------------------------------------------------------------
342
343 CFG_UART_BAUDRATE The default UART speed. This value is used
344 when initialising UART, and should be a
345 standard value like 57600, 9600, etc.
346 NOTE: This value may be overridden if
347 another value is stored in EEPROM!
348 CFG_UART_BUFSIZE The length in bytes of the UART RX FIFO. This
349 will determine the maximum number of received
350 characters to store in memory.
351
352 -----------------------------------------------------------------------*/
353 #ifdef CFG_BRD_LPC1343_REFDESIGN
354 #define CFG_UART_BAUDRATE (115200)
355 #define CFG_UART_BUFSIZE (512)
356 #endif
357
358 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
359 #define CFG_UART_BAUDRATE (115200)
360 #define CFG_UART_BUFSIZE (512)
361 #endif
362
363 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
364 #define CFG_UART_BAUDRATE (115200)
365 #define CFG_UART_BUFSIZE (512)
366 #endif
367
368 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
369 #define CFG_UART_BAUDRATE (57600)
370 #define CFG_UART_BUFSIZE (512)
371 #endif
372
373 #ifdef CFG_BRD_LPC1343_802154USBSTICK
374 #define CFG_UART_BAUDRATE (115200)
375 #define CFG_UART_BUFSIZE (512)
376 #endif
377
378 #ifdef CFG_BRD_LPC1343_OLIMEX_P
379 #define CFG_UART_BAUDRATE (115200)
380 #define CFG_UART_BUFSIZE (512)
381 #endif
382
383 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
384 #define CFG_UART_BAUDRATE (115200)
385 #define CFG_UART_BUFSIZE (512)
386 #endif
387 /*=========================================================================*/
388
389
390 /*=========================================================================
391 SSP
392 -----------------------------------------------------------------------
393
394 CFG_SSP0_SCKPIN_2_11 Indicates which pin should be used for SCK0
395 CFG_SSP0_SCKPIN_0_6
396
397 -----------------------------------------------------------------------*/
398 #ifdef CFG_BRD_LPC1343_REFDESIGN
399 #define CFG_SSP0_SCKPIN_2_11
400 // #define CFG_SSP0_SCKPIN_0_6
401 #endif
402
403 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
404 #define CFG_SSP0_SCKPIN_2_11
405 // #define CFG_SSP0_SCKPIN_0_6
406 #endif
407
408 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
409 #define CFG_SSP0_SCKPIN_2_11
410 // #define CFG_SSP0_SCKPIN_0_6
411 #endif
412
413 #ifdef CFG_BRD_LPC1343_802154USBSTICK
414 // #define CFG_SSP0_SCKPIN_2_11
415 #define CFG_SSP0_SCKPIN_0_6
416 #endif
417
418 #ifdef CFG_BRD_LPC1343_OLIMEX_P
419 #define CFG_SSP0_SCKPIN_2_11
420 // #define CFG_SSP0_SCKPIN_0_6
421 #endif
422
423 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
424 #define CFG_SSP0_SCKPIN_2_11
425 // #define CFG_SSP0_SCKPIN_0_6
426 #endif
427 /*=========================================================================*/
428
429
430 /*=========================================================================
431 ADC
432 -----------------------------------------------------------------------
433
434 ADC_AVERAGING_ENABLE To get better results, the ADC code can take
435 a number of samples and return the average
436 value. This is slower, but can give more
437 accurate results compared to single-reading.
438
439 To enable averaging, set ADC_AVERAGING_ENABLE
440 to a non-zero value.
441 ADC_AVERAGING_SAMPLES The number of ADC samples to read and
442 average if ADC averaging is enabled.
443
444 -----------------------------------------------------------------------*/
445 #ifdef CFG_BRD_LPC1343_REFDESIGN
446 #define ADC_AVERAGING_ENABLE (1)
447 #define ADC_AVERAGING_SAMPLES (5)
448 #endif
449
450 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
451 #define ADC_AVERAGING_ENABLE (1)
452 #define ADC_AVERAGING_SAMPLES (5)
453 #endif
454
455 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
456 #define ADC_AVERAGING_ENABLE (0)
457 #define ADC_AVERAGING_SAMPLES (5)
458 #endif
459
460 #ifdef CFG_BRD_LPC1343_802154USBSTICK
461 #define ADC_AVERAGING_ENABLE (0)
462 #define ADC_AVERAGING_SAMPLES (5)
463 #endif
464
465 #ifdef CFG_BRD_LPC1343_OLIMEX_P
466 #define ADC_AVERAGING_ENABLE (0)
467 #define ADC_AVERAGING_SAMPLES (5)
468 #endif
469
470 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
471 #define ADC_AVERAGING_ENABLE (0)
472 #define ADC_AVERAGING_SAMPLES (5)
473 #endif
474 /*=========================================================================*/
475
476
477 /*=========================================================================
478 ON-BOARD LED
479 -----------------------------------------------------------------------
480
481 CFG_LED_PORT The port for the on board LED
482 CFG_LED_PIN The pin for the on board LED
483 CFG_LED_ON The pin state to turn the LED on (0 = low, 1 = high)
484 CFG_LED_OFF The pin state to turn the LED off (0 = low, 1 = high)
485
486 -----------------------------------------------------------------------*/
487 #ifdef CFG_BRD_LPC1343_REFDESIGN
488 #define CFG_LED_PORT (2)
489 #define CFG_LED_PIN (10)
490 #define CFG_LED_ON (0)
491 #define CFG_LED_OFF (1)
492 #endif
493
494 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
495 #define CFG_LED_PORT (2)
496 #define CFG_LED_PIN (10)
497 #define CFG_LED_ON (0)
498 #define CFG_LED_OFF (1)
499 #endif
500
501 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
502 #define CFG_LED_PORT (2)
503 #define CFG_LED_PIN (10)
504 #define CFG_LED_ON (0)
505 #define CFG_LED_OFF (1)
506 #endif
507
508 #ifdef CFG_BRD_LPC1343_802154USBSTICK
509 #define CFG_LED_PORT (3)
510 #define CFG_LED_PIN (2)
511 #define CFG_LED_ON (0)
512 #define CFG_LED_OFF (1)
513 #endif
514
515 #ifdef CFG_BRD_LPC1343_OLIMEX_P
516 #define CFG_LED_PORT (3)
517 #define CFG_LED_PIN (2)
518 #define CFG_LED_ON (0)
519 #define CFG_LED_OFF (1)
520 #endif
521
522 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
523 #define CFG_LED_PORT (0)
524 #define CFG_LED_PIN (7)
525 #define CFG_LED_ON (0)
526 #define CFG_LED_OFF (1)
527 #endif
528 /*=========================================================================*/
529
530
531 /*=========================================================================
532 MICRO-SD CARD
533 -----------------------------------------------------------------------
534
535 CFG_SDCARD If this field is defined SD Card and FAT32
536 file system support will be included
537 CFG_SDCARD_READONLY If this is set to 1, all commands to
538 write to the SD card will be removed
539 saving some flash space.
540 CFG_SDCARD_CDPORT The card detect port number
541 CFG_SDCARD_CDPIN The card detect pin number
542
543 NOTE: All config settings for FAT32 are defined
544 in ffconf.h
545
546 BENCHMARK: With SPI set to 6.0MHz, FATFS can read
547 ~300KB/s (w/512 byte read buffer)
548
549 PIN LAYOUT: The pin layout that is used by this driver
550 can be seen in the following schematic:
551 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
552
553 DEPENDENCIES: SDCARD requires the use of SSP0.
554 -----------------------------------------------------------------------*/
555 #ifdef CFG_BRD_LPC1343_REFDESIGN
556 // #define CFG_SDCARD
557 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
558 #define CFG_SDCARD_CDPORT (3)
559 #define CFG_SDCARD_CDPIN (0)
560 #endif
561
562 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
563 // #define CFG_SDCARD
564 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
565 #define CFG_SDCARD_CDPORT (3)
566 #define CFG_SDCARD_CDPIN (0)
567 #endif
568
569 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
570 #define CFG_SDCARD
571 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
572 #define CFG_SDCARD_CDPORT (3)
573 #define CFG_SDCARD_CDPIN (0)
574 #endif
575
576 #ifdef CFG_BRD_LPC1343_802154USBSTICK
577 // #define CFG_SDCARD
578 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
579 #define CFG_SDCARD_CDPORT (3)
580 #define CFG_SDCARD_CDPIN (0)
581 #endif
582
583 #ifdef CFG_BRD_LPC1343_OLIMEX_P
584 // #define CFG_SDCARD
585 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
586 #define CFG_SDCARD_CDPORT (3)
587 #define CFG_SDCARD_CDPIN (0)
588 #endif
589
590 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
591 // #define CFG_SDCARD
592 #define CFG_SDCARD_READONLY (1) // Must be 0 or 1
593 #define CFG_SDCARD_CDPORT (3)
594 #define CFG_SDCARD_CDPIN (0)
595 #endif
596 /*=========================================================================*/
597
598
599 /*=========================================================================
600 USB
601 -----------------------------------------------------------------------
602
603 CFG_USBHID If this field is defined USB HID support will
604 be included. Currently uses ROM-based USB HID
605 CFG_USBCDC If this field is defined USB CDC support will
606 be included, with the USB Serial Port speed
607 set to 115200 BPS by default
608 CFG_USBCDC_BAUDRATE The default TX/RX speed. This value is used
609 when initialising USBCDC, and should be a
610 standard value like 57600, 9600, etc.
611 CFG_USBCDC_INITTIMEOUT The maximum delay in milliseconds to wait for
612 USB to connect. Must be a multiple of 10!
613 CFG_USBCDC_BUFFERSIZE Size of the buffer (in bytes) that stores
614 printf data until it can be sent out in
615 64 byte frames. The buffer is required since
616 only one frame per ms can be sent using USB
617 CDC (see 'puts' in systeminit.c).
618
619 -----------------------------------------------------------------------*/
620 #define CFG_USBMSC (1)
621
622
623 #define CFG_USB_VID (0x239A)
624 #define CFG_USB_PID (0x1002)
625
626 #ifdef CFG_BRD_LPC1343_REFDESIGN
627 // #define CFG_USBHID
628 #define CFG_USBCDC
629 #define CFG_USBCDC_BAUDRATE (115200)
630 #define CFG_USBCDC_INITTIMEOUT (5000)
631 #define CFG_USBCDC_BUFFERSIZE (256)
632 #endif
633
634 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
635 // #define CFG_USBHID
636 // #define CFG_USBCDC
637 #define CFG_USBCDC_BAUDRATE (115200)
638 #define CFG_USBCDC_INITTIMEOUT (5000)
639 #define CFG_USBCDC_BUFFERSIZE (256)
640 #endif
641
642 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
643 // #define CFG_USBHID
644 #define CFG_USBCDC
645 #define CFG_USBCDC_BAUDRATE (115200)
646 #define CFG_USBCDC_INITTIMEOUT (5000)
647 #define CFG_USBCDC_BUFFERSIZE (256)
648 #endif
649
650 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
651 // #define CFG_USBHID
652 // #define CFG_USBCDC
653 #define CFG_USBCDC_BAUDRATE (57600)
654 #define CFG_USBCDC_INITTIMEOUT (5000)
655 #define CFG_USBCDC_BUFFERSIZE (256)
656 #endif
657
658 #ifdef CFG_BRD_LPC1343_802154USBSTICK
659 // #define CFG_USBHID
660 #define CFG_USBCDC
661 #define CFG_USBCDC_BAUDRATE (115200)
662 #define CFG_USBCDC_INITTIMEOUT (5000)
663 #define CFG_USBCDC_BUFFERSIZE (256)
664 #endif
665
666 #ifdef CFG_BRD_LPC1343_OLIMEX_P
667 // #define CFG_USBHID
668 #define CFG_USBCDC
669 #define CFG_USBCDC_BAUDRATE (115200)
670 #define CFG_USBCDC_INITTIMEOUT (5000)
671 #define CFG_USBCDC_BUFFERSIZE (256)
672 #endif
673
674 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
675 // #define CFG_USBHID
676 #define CFG_USBCDC
677 #define CFG_USBCDC_BAUDRATE (115200)
678 #define CFG_USBCDC_INITTIMEOUT (5000)
679 #define CFG_USBCDC_BUFFERSIZE (256)
680 #endif
681 /*=========================================================================*/
682
683
684 /*=========================================================================
685 PRINTF REDIRECTION
686 -----------------------------------------------------------------------
687
688 CFG_PRINTF_MAXSTRINGSIZE Maximum size of string buffer for printf
689 CFG_PRINTF_UART Will cause all printf statements to be
690 redirected to UART
691 CFG_PRINTF_USBCDC Will cause all printf statements to be
692 redirect to USB Serial
693 CFG_PRINTF_NEWLINE This is typically "\r\n" for Windows or
694 "\n" for *nix
695
696 Note: If no printf redirection definitions are present, all printf
697 output will be ignored.
698 -----------------------------------------------------------------------*/
699 #ifdef CFG_BRD_LPC1343_REFDESIGN
700 #define CFG_PRINTF_MAXSTRINGSIZE (255)
701 // #define CFG_PRINTF_UART
702 #define CFG_PRINTF_USBCDC
703 #define CFG_PRINTF_NEWLINE "\r\n"
704 #endif
705
706 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
707 #define CFG_PRINTF_MAXSTRINGSIZE (255)
708 #define CFG_PRINTF_UART
709 // #define CFG_PRINTF_USBCDC
710 #define CFG_PRINTF_NEWLINE "\r\n"
711 #endif
712
713 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
714 #define CFG_PRINTF_MAXSTRINGSIZE (255)
715 // #define CFG_PRINTF_UART
716 #define CFG_PRINTF_USBCDC
717 #define CFG_PRINTF_NEWLINE "\r\n"
718 #endif
719
720 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
721 #define CFG_PRINTF_MAXSTRINGSIZE (255)
722 #define CFG_PRINTF_UART
723 // #define CFG_PRINTF_USBCDC
724 #define CFG_PRINTF_NEWLINE "\n"
725 #endif
726
727 #ifdef CFG_BRD_LPC1343_802154USBSTICK
728 #define CFG_PRINTF_MAXSTRINGSIZE (255)
729 // #define CFG_PRINTF_UART
730 #define CFG_PRINTF_USBCDC
731 #define CFG_PRINTF_NEWLINE "\r\n"
732 #endif
733
734 #ifdef CFG_BRD_LPC1343_OLIMEX_P
735 #define CFG_PRINTF_MAXSTRINGSIZE (255)
736 // #define CFG_PRINTF_UART
737 #define CFG_PRINTF_USBCDC
738 #define CFG_PRINTF_NEWLINE "\r\n"
739 #endif
740
741 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
742 #define CFG_PRINTF_MAXSTRINGSIZE (255)
743 // #define CFG_PRINTF_UART
744 #define CFG_PRINTF_USBCDC
745 #define CFG_PRINTF_NEWLINE "\r\n"
746 #endif
747 /*=========================================================================*/
748
749
750 /*=========================================================================
751 COMMAND LINE INTERFACE
752 -----------------------------------------------------------------------
753
754 CFG_INTERFACE If this field is defined the UART or USBCDC
755 based command-line interface will be included
756 CFG_INTERFACE_MAXMSGSIZE The maximum number of bytes to accept for an
757 incoming command
758 CFG_INTERFACE_PROMPT The command prompt to display at the start
759 of every new data entry line
760 CFG_INTERFACE_SILENTMODE If this is set to 1 only text generated in
761 response to commands will be send to the
762 output buffer. The command prompt will not
763 be displayed and incoming text will not be
764 echoed back to the output buffer (allowing
765 you to see the text you have input). This
766 is normally only desirable in a situation
767 where another MCU is communicating with
768 the LPC1343.
769 CFG_INTERFACE_DROPCR If this is set to 1 all incoming \r
770 characters will be dropped
771 CFG_INTERFACE_ENABLEIRQ If this is set to 1 the IRQ pin will be
772 set high when a command starts executing
773 and will go low when the command has
774 finished executing or the LCD is not busy.
775 This allows another device to know when a
776 new command can safely be sent.
777 CFG_INTERFACE_IRQPORT The gpio port for the IRQ/busy pin
778 CFG_INTERFACE_IRQPIN The gpio pin number for the IRQ/busy pin
779 CFG_INTERFACE_SHORTERRORS If this is enabled only short 1 character
780 error messages will be returned (followed
781 by CFG_PRINTF_NEWLINE), rather than more
782 verbose error messages. The specific
783 characters used are defined below.
784 CFG_INTERFACE_CONFIRMREADY If this is set to 1 a text confirmation
785 will be sent when the command prompt is
786 ready for a new command. This is in
787 addition to CFG_INTERFACE_ENABLEIRQ if
788 this is also enabled. The character used
789 is defined below.
790 CFG_INTERFACE_LONGSYSINFO If this is set to 1 extra information will
791 be included in the Sys Info ('V') command
792 on the CLI. This can be useful when trying
793 to debug problems on remote HW, or with
794 unknown firmware. It will also use about
795 0.5KB flash, though, so only enable it is
796 necessary.
797
798 NOTE: The command-line interface will use either
799 USB-CDC or UART depending on whether
800 CFG_PRINTF_UART or CFG_PRINTF_USBCDC are
801 selected.
802 -----------------------------------------------------------------------*/
803 #ifdef CFG_BRD_LPC1343_REFDESIGN
804 #define CFG_INTERFACE
805 #define CFG_INTERFACE_MAXMSGSIZE (256)
806 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
807 #define CFG_INTERFACE_SILENTMODE (0)
808 #define CFG_INTERFACE_DROPCR (0)
809 #define CFG_INTERFACE_ENABLEIRQ (0)
810 #define CFG_INTERFACE_IRQPORT (0)
811 #define CFG_INTERFACE_IRQPIN (7)
812 #define CFG_INTERFACE_SHORTERRORS (0)
813 #define CFG_INTERFACE_CONFIRMREADY (0)
814 #define CFG_INTERFACE_LONGSYSINFO (0)
815 #endif
816
817 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
818 // #define CFG_INTERFACE
819 #define CFG_INTERFACE_MAXMSGSIZE (256)
820 #define CFG_INTERFACE_PROMPT "LPC1343 >> "
821 #define CFG_INTERFACE_SILENTMODE (0)
822 #define CFG_INTERFACE_DROPCR (0)
823 #define CFG_INTERFACE_ENABLEIRQ (0)
824 #define CFG_INTERFACE_IRQPORT (0)
825 #define CFG_INTERFACE_IRQPIN (7)
826 #define CFG_INTERFACE_SHORTERRORS (0)
827 #define CFG_INTERFACE_CONFIRMREADY (0)
828 #define CFG_INTERFACE_LONGSYSINFO (0)
829 #endif
830
831 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB
832 #define CFG_INTERFACE
833 #define CFG_INTERFACE_MAXMSGSIZE (256)
834 #define CFG_INTERFACE_PROMPT "CMD >> "
835 #define CFG_INTERFACE_SILENTMODE (0)
836 #define CFG_INTERFACE_DROPCR (0)
837 #define CFG_INTERFACE_ENABLEIRQ (0)
838 #define CFG_INTERFACE_IRQPORT (0)
839 #define CFG_INTERFACE_IRQPIN (7)
840 #define CFG_INTERFACE_SHORTERRORS (0)
841 #define CFG_INTERFACE_CONFIRMREADY (0)
842 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
843 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
844 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
845 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
846 #define CFG_INTERFACE_LONGSYSINFO (0)
847 #endif
848
849 #ifdef CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
850 #define CFG_INTERFACE
851 #define CFG_INTERFACE_MAXMSGSIZE (256)
852 #define CFG_INTERFACE_PROMPT ">>"
853 #define CFG_INTERFACE_SILENTMODE (1)
854 #define CFG_INTERFACE_DROPCR (1)
855 #define CFG_INTERFACE_ENABLEIRQ (1)
856 #define CFG_INTERFACE_IRQPORT (0)
857 #define CFG_INTERFACE_IRQPIN (7)
858 #define CFG_INTERFACE_SHORTERRORS (1)
859 #define CFG_INTERFACE_CONFIRMREADY (0)
860 #define CFG_INTERFACE_SHORTERRORS_UNKNOWNCOMMAND "?"
861 #define CFG_INTERFACE_SHORTERRORS_TOOMANYARGS ">"
862 #define CFG_INTERFACE_SHORTERRORS_TOOFEWARGS "<"
863 #define CFG_INTERFACE_CONFIRMREADY_TEXT "."
864 #define CFG_INTERFACE_LONGSYSINFO (0)
865 #endif
866
867 #ifdef CFG_BRD_LPC1343_802154USBSTICK
868 // #define CFG_INTERFACE
869 #define CFG_INTERFACE_MAXMSGSIZE (256)
870 #define CFG_INTERFACE_PROMPT "CMD >> "
871 #define CFG_INTERFACE_SILENTMODE (0)
872 #define CFG_INTERFACE_DROPCR (0)
873 #define CFG_INTERFACE_ENABLEIRQ (0)
874 #define CFG_INTERFACE_IRQPORT (0)
875 #define CFG_INTERFACE_IRQPIN (7)
876 #define CFG_INTERFACE_SHORTERRORS (0)
877 #define CFG_INTERFACE_CONFIRMREADY (0)
878 #define CFG_INTERFACE_LONGSYSINFO (0)
879 #endif
880
881 #ifdef CFG_BRD_LPC1343_OLIMEX_P
882 #define CFG_INTERFACE
883 #define CFG_INTERFACE_MAXMSGSIZE (256)
884 #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
885 #define CFG_INTERFACE_SILENTMODE (0)
886 #define CFG_INTERFACE_DROPCR (0)
887 #define CFG_INTERFACE_ENABLEIRQ (0)
888 #define CFG_INTERFACE_IRQPORT (0)
889 #define CFG_INTERFACE_IRQPIN (7)
890 #define CFG_INTERFACE_SHORTERRORS (0)
891 #define CFG_INTERFACE_CONFIRMREADY (0)
892 #define CFG_INTERFACE_LONGSYSINFO (0)
893 #endif
894
895 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
896 #define CFG_INTERFACE
897 #define CFG_INTERFACE_MAXMSGSIZE (256)
898 #define CFG_INTERFACE_PROMPT "LPC-P1343 >> "
899 #define CFG_INTERFACE_SILENTMODE (0)
900 #define CFG_INTERFACE_DROPCR (0)
901 #define CFG_INTERFACE_ENABLEIRQ (0)
902 #define CFG_INTERFACE_IRQPORT (0)
903 #define CFG_INTERFACE_IRQPIN (7)
904 #define CFG_INTERFACE_SHORTERRORS (0)
905 #define CFG_INTERFACE_CONFIRMREADY (0)
906 #define CFG_INTERFACE_LONGSYSINFO (0)
907 #endif
908 /*=========================================================================*/
909
910
911 /*=========================================================================
912 PWM SETTINGS
913 -----------------------------------------------------------------------
914
915 CFG_PWM If this is defined, a basic PWM driver
916 will be included using 16-bit Timer 1 and
917 Pin 1.9 (MAT0) for the PWM output. In
918 order to allow for a fixed number of
919 pulses to be generated, some PWM-specific
920 code is required in the 16-Bit Timer 1
921 ISR. See "core/timer16/timer16.c" for
922 more information.
923 CFG_PWM_DEFAULT_PULSEWIDTH The default pulse width in ticks
924 CFG_PWM_DEFAULT_DUTYCYCLE The default duty cycle in percent
925
926 DEPENDENCIES: PWM output requires the use of 16-bit
927 timer 1 and pin 1.9 (CT16B1_MAT0).
928 -----------------------------------------------------------------------*/
929 // #define CFG_PWM
930 #define CFG_PWM_DEFAULT_PULSEWIDTH (CFG_CPU_CCLK / 1000)
931 #define CFG_PWM_DEFAULT_DUTYCYCLE (50)
932 /*=========================================================================*/
933
934
935 /*=========================================================================
936 STEPPER MOTOR SETTINGS
937 -----------------------------------------------------------------------
938
939 CFG_STEPPER If this is defined, a simple bi-polar
940 stepper motor will be included for common
941 H-bridge chips like the L293D or SN754410N
942
943 DEPENDENCIES: STEPPER requires the use of pins 3.0-3 and
944 32-bit Timer 0.
945 -----------------------------------------------------------------------*/
946 // #define CFG_STEPPER
947 /*=========================================================================*/
948
949
950 /*=========================================================================
951 EEPROM
952 -----------------------------------------------------------------------
953
954 CFG_I2CEEPROM If defined, drivers for the onboard EEPROM
955 will be included during build
956 CFG_I2CEEPROM_SIZE The number of bytes available on the EEPROM
957
958 -----------------------------------------------------------------------*/
959 #ifdef CFG_BRD_LPC1343_REFDESIGN
960 #define CFG_I2CEEPROM
961 #define CFG_I2CEEPROM_SIZE (3072)
962 #endif
963
964 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
965 // #define CFG_I2CEEPROM
966 #define CFG_I2CEEPROM_SIZE (3072)
967 #endif
968
969 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
970 #define CFG_I2CEEPROM
971 #define CFG_I2CEEPROM_SIZE (3072)
972 #endif
973
974 #ifdef CFG_BRD_LPC1343_802154USBSTICK
975 #define CFG_I2CEEPROM
976 #define CFG_I2CEEPROM_SIZE (3072)
977 #endif
978
979 #ifdef CFG_BRD_LPC1343_OLIMEX_P
980 // #define CFG_I2CEEPROM
981 #define CFG_I2CEEPROM_SIZE (3072)
982 #endif
983
984 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
985 // #define CFG_I2CEEPROM
986 #define CFG_I2CEEPROM_SIZE (3072)
987 #endif
988 /*=========================================================================*/
989
990
991 /*=========================================================================
992 EEPROM MEMORY MAP
993 -----------------------------------------------------------------------
994 EEPROM is used to persist certain user modifiable values to make
995 sure that these changes remain in effect after a reset or hard
996 power-down. The addresses in EEPROM for these various system
997 settings/values are defined below. The first 256 bytes of EEPROM
998 are reserved for this (0x0000..0x00FF).
999
1000 CFG_EEPROM_RESERVED The last byte of reserved EEPROM memory
1001
1002 EEPROM Address (0x0000..0x00FF)
1003 ===============================
1004 0 1 2 3 4 5 6 7 8 9 A B C D E F
1005 000x x x x x x x x x . x x . . . . . Chibi
1006 001x . . . . . . . . . . . . . . . .
1007 002x x x x x . . . . . . . . . . . . UART
1008 003x x x x x x x x x x x x x x x x x Touch Screen Calibration
1009 004x x x x x x x x x x x x x x x . . Touch Screen Calibration
1010 005x . . . . . . . . . . . . . . . .
1011 006x . . . . . . . . . . . . . . . .
1012 007x . . . . . . . . . . . . . . . .
1013 008x . . . . . . . . . . . . . . . .
1014 009x . . . . . . . . . . . . . . . .
1015 00Ax . . . . . . . . . . . . . . . .
1016 00Bx . . . . . . . . . . . . . . . .
1017 00Cx . . . . . . . . . . . . . . . .
1018 00Dx . . . . . . . . . . . . . . . .
1019 00Ex . . . . . . . . . . . . . . . .
1020 00Fx . . . . . . . . . . . . . . . .
1021
1022 -----------------------------------------------------------------------*/
1023 #define CFG_EEPROM_RESERVED (0x00FF) // Protect first 256 bytes of memory
1024 #define CFG_EEPROM_CHIBI_IEEEADDR (uint16_t)(0x0000) // 8
1025 #define CFG_EEPROM_CHIBI_SHORTADDR (uint16_t)(0x0009) // 2
1026 #define CFG_EEPROM_UART_SPEED (uint16_t)(0x0020) // 4
1027 #define CFG_EEPROM_TOUCHSCREEN_CALIBRATED (uint16_t)(0x0030) // 1
1028 #define CFG_EEPROM_TOUCHSCREEN_CAL_AN (uint16_t)(0x0031) // 4
1029 #define CFG_EEPROM_TOUCHSCREEN_CAL_BN (uint16_t)(0x0035) // 4
1030 #define CFG_EEPROM_TOUCHSCREEN_CAL_CN (uint16_t)(0x0039) // 4
1031 #define CFG_EEPROM_TOUCHSCREEN_CAL_DN (uint16_t)(0x003D) // 4
1032 #define CFG_EEPROM_TOUCHSCREEN_CAL_EN (uint16_t)(0x0041) // 4
1033 #define CFG_EEPROM_TOUCHSCREEN_CAL_FN (uint16_t)(0x0045) // 4
1034 #define CFG_EEPROM_TOUCHSCREEN_CAL_DIVIDER (uint16_t)(0x0049) // 4
1035 #define CFG_EEPROM_TOUCHSCREEN_THRESHHOLD (uint16_t)(0x004D) // 1
1036 /*=========================================================================*/
1037
1038
1039 /*=========================================================================
1040 LM75B TEMPERATURE SENSOR
1041 -----------------------------------------------------------------------
1042
1043 CFG_LM75B If defined, drivers for an optional LM75B
1044 temperature sensor will be included during
1045 build (requires external HW)
1046
1047 -----------------------------------------------------------------------*/
1048 // #define CFG_LM75B
1049 /*=========================================================================*/
1050
1051
1052 /*=========================================================================
1053 CHIBI WIRELESS STACK
1054 -----------------------------------------------------------------------
1055
1056 CFG_CHIBI If defined, the CHIBI wireless stack will be
1057 included during build. Requires external HW.
1058 CFG_CHIBI_MODE The mode to use when receiving and transmitting
1059 wireless data. See chb_drvr.h for possible values
1060 CFG_CHIBI_POWER The power level to use when transmitting. See
1061 chb_drvr.h for possible values
1062 CFG_CHIBI_CHANNEL 802.15.4 Channel (0 = 868MHz, 1-10 = 915MHz)
1063 CFG_CHIBI_PANID 16-bit PAN Identifier (ex.0x1234)
1064 CFG_CHIBI_PROMISCUOUS Set to 1 to enabled promiscuous mode or
1065 0 to disable it. If promiscuous mode is
1066 enabled be sure to set CFG_CHIBI_BUFFERSIZE
1067 to an appropriately large value (ex. 1024)
1068 CFG_CHIBI_BUFFERSIZE The size of the message buffer in bytes
1069
1070 DEPENDENCIES: Chibi requires the use of SSP0, 16-bit timer
1071 0 and pins 3.1, 3.2, 3.3. It also requires
1072 the presence of CFG_I2CEEPROM.
1073
1074 NOTE: These settings are not relevant to all boards!
1075 'tools/schematics/AT86RF212LPC1114_v1.6.pdf'
1076 show how 'CHIBI' is meant to be connected
1077 -----------------------------------------------------------------------*/
1078 #ifdef CFG_BRD_LPC1343_REFDESIGN
1079 // #define CFG_CHIBI
1080 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1081 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1082 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1083 #define CFG_CHIBI_PANID (0x1234)
1084 #define CFG_CHIBI_PROMISCUOUS (0)
1085 #define CFG_CHIBI_BUFFERSIZE (128)
1086 #endif
1087
1088 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1089 // #define CFG_CHIBI
1090 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1091 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1092 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1093 #define CFG_CHIBI_PANID (0x1234)
1094 #define CFG_CHIBI_PROMISCUOUS (0)
1095 #define CFG_CHIBI_BUFFERSIZE (128)
1096 #endif
1097
1098 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1099 // #define CFG_CHIBI
1100 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1101 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1102 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1103 #define CFG_CHIBI_PANID (0x1234)
1104 #define CFG_CHIBI_PROMISCUOUS (0)
1105 #define CFG_CHIBI_BUFFERSIZE (128)
1106 #endif
1107
1108 #ifdef CFG_BRD_LPC1343_802154USBSTICK
1109 #define CFG_CHIBI
1110 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1111 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1112 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1113 #define CFG_CHIBI_PANID (0x1234)
1114 #define CFG_CHIBI_PROMISCUOUS (0)
1115 #define CFG_CHIBI_BUFFERSIZE (1024)
1116 #endif
1117
1118 #ifdef CFG_BRD_LPC1343_OLIMEX_P
1119 // #define CFG_CHIBI
1120 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1121 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1122 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1123 #define CFG_CHIBI_PANID (0x1234)
1124 #define CFG_CHIBI_PROMISCUOUS (0)
1125 #define CFG_CHIBI_BUFFERSIZE (128)
1126 #endif
1127
1128 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
1129 // #define CFG_CHIBI
1130 #define CFG_CHIBI_MODE (0) // OQPSK_868MHZ
1131 #define CFG_CHIBI_POWER (0xE9) // CHB_PWR_EU2_3DBM
1132 #define CFG_CHIBI_CHANNEL (0) // 868-868.6 MHz
1133 #define CFG_CHIBI_PANID (0x1234)
1134 #define CFG_CHIBI_PROMISCUOUS (0)
1135 #define CFG_CHIBI_BUFFERSIZE (128)
1136 #endif
1137 /*=========================================================================*/
1138
1139
1140 /*=========================================================================
1141 TFT LCD
1142 -----------------------------------------------------------------------
1143
1144 CFG_TFTLCD If defined, this will cause drivers for
1145 a pre-determined LCD screen to be included
1146 during build. Only one LCD driver can be
1147 included during the build process (for ex.
1148 'drivers/displays/hw/ILI9325.c')
1149 CFG_TFTLCD_INCLUDESMALLFONTS If set to 1, smallfont support will be
1150 included for 3x6, 5x8, 7x8 and 8x8 fonts.
1151 This should only be enabled if these small
1152 fonts are required since there is already
1153 support for larger fonts generated with
1154 Dot Factory
1155 http://www.pavius.net/downloads/tools/53-the-dot-factory
1156 CFG_TFTLCD_USEAAFONTS If set to a non-zero value, anti-aliased
1157 fonts will be used instead of regular 1-bit
1158 font. These result in much higher-
1159 quality text, but the fonts are 2 or 4
1160 times larger than plain bitmap fonts and
1161 take a bit more rendering time to display.
1162 CFG_TFTLCD_TS_DEFAULTTHRESHOLD Default minimum threshold to trigger a
1163 touch event with the touch screen (and exit
1164 from 'tsWaitForEvent' in touchscreen.c).
1165 Should be an 8-bit value somewhere between
1166 8 and 75 in normal circumstances. This is
1167 the default value and may be overriden by
1168 a value stored in EEPROM.
1169 CFG_TFTLCD_TS_KEYPADDELAY The delay in milliseconds between key
1170 presses in dialogue boxes
1171
1172 PIN LAYOUT: The pin layout that is used by this driver
1173 can be seen in the following schematic:
1174 /tools/schematics/Breakout_TFTLCD_ILI9325_v1.3
1175
1176 DEPENDENCIES: TFTLCD requires the use of pins 1.8, 1.9,
1177 1.10, 1.11, 3.3 and 2.1-9.
1178 -----------------------------------------------------------------------*/
1179 #ifdef CFG_BRD_LPC1343_REFDESIGN
1180 // #define CFG_TFTLCD
1181 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1182 #define CFG_TFTLCD_USEAAFONTS (0)
1183 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1184 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1185 #endif
1186
1187 #ifdef CFG_BRD_LPC1343_REFDESIGN_MINIMAL
1188 // #define CFG_TFTLCD
1189 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1190 #define CFG_TFTLCD_USEAAFONTS (0)
1191 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1192 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1193 #endif
1194
1195 #if defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB || defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART
1196 #define CFG_TFTLCD
1197 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1198 #define CFG_TFTLCD_USEAAFONTS (0)
1199 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1200 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1201 #endif
1202
1203 #ifdef CFG_BRD_LPC1343_802154USBSTICK
1204 // #define CFG_TFTLCD
1205 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1206 #define CFG_TFTLCD_USEAAFONTS (0)
1207 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1208 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1209 #endif
1210
1211 #ifdef CFG_BRD_LPC1343_OLIMEX_P
1212 // #define CFG_TFTLCD
1213 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1214 #define CFG_TFTLCD_USEAAFONTS (0)
1215 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1216 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1217 #endif
1218
1219 #ifdef CFG_BRD_LPC1343_LPCXPRESSO
1220 // #define CFG_TFTLCD
1221 #define CFG_TFTLCD_INCLUDESMALLFONTS (0)
1222 #define CFG_TFTLCD_USEAAFONTS (0)
1223 #define CFG_TFTLCD_TS_DEFAULTTHRESHOLD (50)
1224 #define CFG_TFTLCD_TS_KEYPADDELAY (100)
1225 #endif
1226 /*=========================================================================*/
1227
1228
1229 /*=========================================================================
1230 Monochrome/Bitmap Graphic LCDs
1231 -----------------------------------------------------------------------
1232
1233 CFG_ST7565 If defined, this will cause drivers for
1234 the 128x64 pixel ST7565 LCD to be included
1235 CFG_SSD1306 If defined, this will cause drivers for
1236 the 128x64 pixel SSD1306 OLED display to be
1237 included (using bit-banged SPI)
1238 CFG_SHARPMEM If defined, this will cause drivers for
1239 Sharp Memory Displays to be included
1240
1241 DEPENDENCIES: ST7565 requires the use of pins 2.1-6.
1242 DEPENDENCIES: SSD1306 requires the use of pins 2.1-6.
1243 DEPENDENCIES: SSD1306_I2C requires the use of pins 2.2.
1244 DEPENDENCIES: SHARPMEM requires the use of pins 2.1-4.
1245 -----------------------------------------------------------------------*/
1246 // #define CFG_ST7565
1247 // #define CFG_SSD1306
1248 // #define CFG_SHARPMEM
1249 /*=========================================================================*/
1250
1251
1252 /*=========================================================================
1253 RSA Encryption
1254 -----------------------------------------------------------------------
1255
1256 CFG_RSA If defined, support for basic RSA
1257 encryption will be included.
1258 CFG_RSA_BITS Indicates the number of bits used for
1259 RSA encryption keys. To keep code size
1260 reasonable, RSA encryption is currently
1261 limited to using 64-bit or 32-bit numbers,
1262 with 64-bit providing higher security, and
1263 32-bit providing smaller encrypted text
1264 size.
1265
1266 NOTE: Please note that Printf can not be
1267 used to display 64-bit values (%lld)!
1268 -----------------------------------------------------------------------*/
1269 // #define CFG_RSA
1270 #define CFG_RSA_BITS (32)
1271 /*=========================================================================*/
1272
1273
1274
1275
1276 /*=========================================================================
1277 CONFIG FILE VALIDATION
1278 -------------------------------------------------------------------------
1279 Basic error checking to make sure that incompatible defines are not
1280 enabled at the same time, etc.
1281
1282 =========================================================================*/
1283
1284 #if !defined CFG_BRD_LPC1343_REFDESIGN && \
1285 !defined CFG_BRD_LPC1343_REFDESIGN_MINIMAL && \
1286 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_USB && \
1287 !defined CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART && \
1288 !defined CFG_BRD_LPC1343_802154USBSTICK && \
1289 !defined CFG_BRD_LPC1343_OLIMEX_P && \
1290 !defined CFG_BRD_LPC1343_LPCXPRESSO
1291 #error "You must defined a target board (CFG_BRD_LPC1343_REFDESIGN or CFG_BRD_LPC1343_REFDESIGN_MINIMAL or CFG_BRD_LPC1343_TFTLCDSTANDALONE or CFG_BRD_LPC1343_TFTLCDSTANDALONE_UART or CFG_BRD_LPC1343_802154USBSTICK or CFG_BRD_LPC1343_LPCXPRESSO)"
1292 #endif
1293
1294 #if defined CFG_PRINTF_USBCDC && defined CFG_PRINTF_UART
1295 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC cannot both be defined at once"
1296 #endif
1297
1298 #if defined CFG_PRINTF_USBCDC && !defined CFG_USBCDC
1299 #error "CFG_PRINTF_CDC requires CFG_USBCDC to be defined as well"
1300 #endif
1301
1302 #if defined CFG_USBCDC && defined CFG_USBHID
1303 #error "Only one USB class can be defined at a time (CFG_USBCDC or CFG_USBHID)"
1304 #endif
1305
1306 #if defined CFG_SSP0_SCKPIN_2_11 && defined CFG_SSP0_SCKPIN_0_6
1307 #error "Only one SCK pin can be defined at a time for SSP0"
1308 #endif
1309
1310 #if !defined CFG_SSP0_SCKPIN_2_11 && !defined CFG_SSP0_SCKPIN_0_6
1311 #error "An SCK pin must be selected for SSP0 (CFG_SSP0_SCKPIN_2_11 or CFG_SSP0_SCKPIN_0_6)"
1312 #endif
1313
1314 #ifdef CFG_INTERFACE
1315 #if !defined CFG_PRINTF_UART && !defined CFG_PRINTF_USBCDC
1316 #error "CFG_PRINTF_UART or CFG_PRINTF_USBCDC must be defined for for CFG_INTERFACE Input/Output"
1317 #endif
1318 #if defined CFG_PRINTF_USBCDC && CFG_INTERFACE_SILENTMODE == 1
1319 #error "CFG_INTERFACE_SILENTMODE typically isn't enabled with CFG_PRINTF_USBCDC"
1320 #endif
1321 #endif
1322
1323 #ifdef CFG_CHIBI
1324 #if !defined CFG_I2CEEPROM
1325 #error "CFG_CHIBI requires CFG_I2CEEPROM to store and retrieve addresses"
1326 #endif
1327 #ifdef CFG_SDCARD
1328 #error "CFG_CHIBI and CFG_SDCARD can not be defined at the same time. Only one SPI block is available on the LPC1343."
1329 #endif
1330 #ifdef CFG_TFTLCD
1331 #error "CFG_CHIBI and CFG_TFTLCD can not be defined at the same time since they both use pins 1.8, 1.9 and 1.10."
1332 #endif
1333 #ifdef CFG_PWM
1334 #error "CFG_CHIBI and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1335 #endif
1336 #if CFG_CHIBI_PROMISCUOUS != 0 && CFG_CHIBI_PROMISCUOUS != 1
1337 #error "CFG_CHIBI_PROMISCUOUS must be equal to either 1 or 0"
1338 #endif
1339 #if !defined GPIO_ENABLE_IRQ1
1340 #error "GPIO_ENABLE_IRQ1 must be enabled when using Chibi (Chibi IRQ is on GPIO1.8)"
1341 #endif
1342 #endif
1343
1344 #ifdef CFG_TFTLCD
1345 #ifdef CFG_ST7565
1346 #error "CFG_TFTLCD and CFG_ST7565 can not be defined at the same time."
1347 #endif
1348 #ifdef CFG_SSD1306
1349 #error "CFG_TFTLCD and CFG_SSD1306 can not be defined at the same time."
1350 #endif
1351 #ifdef CFG_SHARPMEM
1352 #error "CFG_TFTLCD and CFG_SHARPMEM can not be defined at the same time."
1353 #endif
1354 #ifdef CFG_PWM
1355 #error "CFG_TFTLCD and CFG_PWM can not be defined at the same time since they both use pin 1.9."
1356 #endif
1357 #if !defined CFG_I2CEEPROM
1358 #error "CFG_TFTLCD requires CFG_I2CEEPROM to store and retrieve configuration settings"
1359 #endif
1360 #endif
1361
1362 #ifdef CFG_SDCARD
1363 #ifdef CFG_STEPPER
1364 #error "CFG_SDCARD and CFG_STEPPER can not be defined at the same time since they both use pin 3.0."
1365 #endif
1366 #endif
1367
1368 #ifdef CFG_ST7565
1369 #ifdef CFG_SSD1306
1370 #error "CFG_ST7565 and CFG_SSD1306 can not be defined at the same time"
1371 #endif
1372 #endif
1373
1374 #ifdef CFG_RSA
1375 #if CFG_RSA_BITS != 64 && CFG_RSA_BITS != 32
1376 #error "CFG_RSA_BITS must be equal to either 32 or 64."
1377 #endif
1378 #endif
1379
1380 #if ADC_AVERAGING_ENABLE && ADC_AVERAGING_SAMPLES < 1
1381 #error "ADC_AVERAGING_SAMPLES must be 1 or higher when ADC averaging is enabled"
1382 #endif
1383
1384 #endif
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